Renesas Electronics America

Principal Electrical Engineer

Renesas Electronics America$130K — $155K *
Aerospace & Defense
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • 10+ years experience in Verilog RTL and VerilogAMS, VerilogA, Verilog (or SV) languages for ASICs and FPGAs
  • MSEE/PhD with relevant digital design experience
  • Skilled in developing design constraints and synthesis scripts
  • Experience in behavioral modeling and mixed-signal verification methodology
  • Proficient in scan insertion and ATPG generation
  • Ability to work independently with limited supervision
  • Strong written and verbal English skills, organized and self-motivated

Responsibilities

  • Participate in all stages of product development, including specification and timing analysis
  • Architect and write RTL for digital interfaces, controllers, and algorithms
  • Perform synthesis and achieve timing convergence for designs
  • Develop and verify self-tested test benches for mixed-signal chips
  • Maximize verification coverage efficiently
  • Collaborate with team to integrate verification plans into a Master plan
  • Drive for continuous improvement in all aspects of work

Benefits

  • Competitive benefits package offered
  • More information to be provided during the hiring process
Full Job Description
Renesas is looking for an experienced Digital Design Engineer for our RadHard product team. This team develops high performance, radiation-hardened mixed-signal integrated solutions. The environment is fast paced and team members are empowered to make decisions within the scope of their job function. The successful candidate will be responsible for designingdigital circuits and supporting the mixed-signal verification environment. • Actively involved in all stages of product development including specification, design, synthesis, verification, timing analysis, design for test and silicon debug. • Architecting and writing the RTL for such circuits as digital interfaces, controllers, state machines and algorithms. • Performing synthesis and achieving timing convergence. • Develop and verify self-tested test benches for Mixed-signal chips and sub-circuits. • Strives for maximal verification coverage in the most time efficient manner. • Works with team to integrate the AMS and DV verification plans into one Master verification plan. • Works diligently to accomplish project goals and meet schedule requirements. • Drives towards continuous personal, team, project and Company improvement Required: • 10+ years' experience in Verilog RTL coding and versed in VerilogAMS, VerilogA, Verilog (or SV) languages for both ASICs and FPGAs • MSEE/PhD with relevant work experience with a strong background in digital design • Proficient developing design constraints and Synthesis scripts. • Experience with behavioral top level modeling and mixed signal verification methodology. • Experience with scan insertion and ATPG generation. • Must be able to work independently with limited supervision. Must be very organized, self-motivated and passionate about the work. • Language skills: Written and verbal English language proficiency required. • Tools: Cadence Design Tools and Synopsys DC proficiency required. Cadence AMS design flow experience is a definite plus. Preferred: • PhD in EE • 15+ years' experience Digital design • Radiation Harden (Rad-Hard) experience We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us?

About Renesas Electronics America

Renesas Electronics America is a leading supplier of advanced semiconductor solutions including microcontrollers, SoC solutions and a broad range of analog and power devices, with operations spanning research, development, design and manufacturing for a wide range of applications.
Learn more about Renesas Electronics America
Size
2,000 employees
Industry

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