Your role and responsibilities:The successful candidate will work within the photonic integration team to develop cutting-edge passive and active components used throughout Xanadu's fault-tolerant architecture. In this role, you will participate in developing our internal PDK with special focus on achieving ultra-low insertion loss for quantum optical computing applications. Additionally, you will be in charge of mask designs for fabrication process optimization, bridging the gap between simulation and experiment by designing advanced test structures with sub-milli-dB to micro-dB level sensitivity to insertion losses. This role offers the opportunity to gain design experience with state-of-the-art foundry processes at Xanadu's 200mm and 300mm fabrication partners.
Required qualifications and experience:- MSc or PhD in Engineering, Science, or related field, with 2+ years of experience in an industrial setting
- Expert-level experience with scripted photonic mask design/layout with one or more of the following tools: ipkiss3, gdsfactory, Virtuoso, OptoDesigner, or similar tools.
- Expert-level knowledge and experience in performing physical verification with homemade and/or foundry-provided codes, including DRC (design rule check) and LVS (layout versus schematic) to ensure manufacturing compliance and netlist integrity
- Expert-level experience with generating layout in the format of GDSII/OAS in MPW and dedicated full mask sets
- Background in developing on-chip integrated passive photonic components, including gratings, ring/racetrack resonators, directional couplers, MMIs
- Experience working in a collaborative team-based development environment, preferably using version control systems such as Git
- Ability to operate in a fast-paced environment and manage multiple competing priorities
Preferred qualifications and experience:- Experience in designing test structures for propagation loss extraction with ultra-high precision
- Experience in designing test structures (and experiments) for loss origin identification, being able to quantify scattering loss and absorption loss within photonic waveguides with advanced test structures
- Experience in designing the layout for superconducting devices (e.g.: SNSPDs), and understanding their operation principles
- Experience in implementing automated routing algorithms for large-scale photonic integrated circuit layout, targeting minimized routing loss and photonic circuit footprint
- Experience in layout with incorporation of fabrication processes effects such as lithographic rounding, OPC/bias correction and material non-uniformity into component optimization
This is for a new position. Your base salary will be determined based on your location, experience, and internal benchmarks. The base salary range is 110,000 - 130,000 CAD. You will also be eligible for equity and benefits.
