We are looking for a Phased Array DSP & Digital Beamforming Architect to join the Payload Architecture team in San Diego. This is a cross-program position that sits at the intersection of satellite system performance and phased array digital implementation - translating what the constellation needs to deliver into how the digital beamforming, signal processing, and data transport must be architected across both the Direct-to-Device (cellular-band) and Broadband (Ka-band) payloads. You will work closely with experienced architects and engineers across silicon, communication systems, and software disciplines, contributing to an architecture that must perform reliably from first power-on through years of unattended operation in low Earth orbit.

As the digital and DSP owner for the phased array, you will define how the antenna system achieves its performance targets from the digital side - establishing the architecture for digital beamforming, beam quality management, sidelobe control, null steering, beam scheduling, and multi-beam resource allocation. You will partner with silicon teams on chip architecture and performance targets, engage communication systems teams on waveform requirements and link performance, and work with software teams on beamforming algorithms and beam management. In addition to defining requirements for silicon, communication systems, and software teams, you will partner with each discipline through design, integration, and test - jointly resolving trade-offs and driving architecture outcomes measured in EIRP, G/T, and multi-beam efficiency.

The technical scope is broad and deep. You will own DPD and CFR architecture to preserve transmit signal quality across the full range of beam steering conditions and power levels. You will define fronthaul architecture and high-speed SerDes backend design, establishing how payload data is transported and distributed across digital subsystems. Backend throughput management - ensuring the digital backbone handles aggregate traffic load across all active beams - is a core responsibility, as is capacity allocation across beams and digital domains. You will architect redundancy and graceful degradation strategies so that digital processing and transport paths continue delivering service when individual components fail - because in-orbit hardware cannot be repaired.

The space environment shapes every decision in this role. Radiation effects on digital processing platforms require purpose-built mitigation strategies that preserve both performance and reliability across the satellite's operational life. Thermal and power constraints are first-order inputs to architecture choices, not afterthoughts. You will work with the verification team to validate the phased array digital architecture through test, and you will collaborate across silicon, communication systems, software, systems, hardware design, antenna, calibration, thermal, power, mechanical, and reliability teams to drive the architecture from early concept through production and on-orbit performance. Beyond the current programs, you will evaluate emerging digital beamforming techniques and next-generation processing platforms to shape the architecture roadmap for future satellite generations.

This is a hands-on role - you will be in the lab, in the data, and on call when satellites are live. If you have experience in phased array DSP architecture and digital beamforming, we want to hear from you.

Export Control Requirement:

Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Key job responsibilities
• Own the phased array digital and DSP architecture across both D2D and Broadband payloads - spanning digital beamforming, signal processing, and data transport
• Translate satellite system performance targets into phased array digital architecture decisions across the beamforming stack - including EIRP, G/T, multi-beam efficiency, and signal quality
• Partner with silicon teams on beamformer chip architecture, interface definitions, and performance targets through design, integration, and characterization
• Partner with communication systems teams on waveform requirements, link performance, and digital processing trade-offs to support end-to-end capacity goals
• Partner with software teams on beamforming algorithm architecture including beam scheduling, null steering, and adaptive beamforming through to validated hardware performance
• Drive phased array beam quality, sidelobe performance, and multi-beam efficiency through digital architecture decisions across all operating conditions
• Architect DPD and CFR to maintain transmit signal quality across beam steering angles, power levels, and thermal conditions
• Define fronthaul architecture and high-speed SerDes backend for payload data transport and distribution across digital subsystems
• Architect backend throughput management and capacity allocation across beams and digital subsystems
• Define redundancy and graceful degradation strategies for digital processing and transport paths
• Define radiation mitigation approach for digital processing platforms
• Evaluate emerging technologies for future architecture roadmap, and support production and on-orbit performance - hands-on, on-call

A day in the life

A typical day involves a mix of architecture work, cross-discipline collaboration, and hands-on analysis. You might spend the morning reviewing digital beamforming architecture trade-offs with the silicon team, then move to a session with communication systems engineers working through link performance and waveform requirements. Afternoons often involve DPD or backend throughput analysis, reviewing signal quality data from integration testing, or working through a redundancy architecture trade study. Lab time is part of the rhythm - characterizing beamforming performance, validating signal quality through the digital chain, or supporting phased array integration. When a satellite is live, you are available. Some weeks are heavier on roadmap work and emerging technology evaluation; others are dominated by resolving a specific performance challenge in the current program.

About the team

The Payload Architecture team is part of the Antenna organization at Amazon Leo. We are a small group of senior architects responsible for the phased array architecture across Amazon Leo's satellite programs. We define the architecture, drive requirements, run trade studies, and make sure everything works from prototype through orbit. Our scope extends to customer link performance - working with systems and customer terminal teams to close end-to-end link budgets. We work closely with every engineering team on the payload and pride ourselves on being hands-on problem solvers.

BASIC QUALIFICATIONS

- Master's degree in electrical engineering, computer engineering, or equivalent

- 7+ years of digital design in communication systems experience

- Experience contributing to the architecture and design (architecture, design patterns, reliability and scaling) of new and current systems, or experience in embedded wireless systems

- Experience in developing link and system level simulators using MATLAB, Python, or C++

- Experience with RF measurement equipment, including: power meters, spectrum analyzers, vector signal generators, network analyzers, oscilloscopes

- 7+ years of experience in phased array DSP architecture, digital beamforming, or high-speed digital design

- Experience in phased array digital beamforming architecture, including system-level design for multi-element or multi-beam antenna systems

- Experience collaborating across silicon, communications systems, and software disciplines in phased array or wireless system development

- Experience developing DSP system models, beamforming simulations, or link-level analyses using MATLAB, Python, or C++

PREFERRED QUALIFICATIONS

- Experience in Space Vehicle/Satellite Operations, Space Communications or related industry

- PhD in electrical engineering, computer science, mathematics or physics

- Experience working closely with physical design teams to develop highly optimized ASICs with excellent power, performance and area

- Experience with DPD or CFR architecture for phased array transmit chains and experience with high-speed SerDes, fronthaul, or digital backend architecture

- Experience with radiation effects on digital systems and mitigation strategies for space applications

- Experience designing redundancy, failover, or graceful degradation into digital processing architectures for space, defense, or other high-reliability environments

The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.

USA, CA, San Diego - 159,200.00 - 215,300.00 USD annually