PCB Design Engineer

Neros Technologies

$115K — $162K *
Manufacturing & Automotive
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • 7+ years of PCB layout/design experience leading to production
  • Expert proficiency with Altium Designer, including library management
  • Demonstrated ownership of a corporate CAD library
  • Experience designing boards to IPC standards
  • Experience with flex and rigid-flex designs
  • Expertise in RF and high-speed digital layout techniques
  • Proven ability to produce complete manufacturing documentation

Responsibilities

  • Own PCB layout from schematic release to fabrication, including design rule closure
  • Read and apply layout practices from design engineers' schematics
  • Manage the Altium library for all project components
  • Implement RF and high-speed digital design strategies
  • Design flexible and rigid-flex circuits with precise construction methods
  • Produce IPC-compliant fabrication and assembly documents
  • Collaborate with vendors on design and manufacturing issues

Benefits

  • Work onsite at our Torrance headquarters
  • Engagement in high-reliability applications like UAV and medical
  • Potential for equity grants as part of the compensation package
Full Job Description
What you will be doing

As a PCB Design Engineer at Neros, you will own printed circuit board layout across every product line we build, from the compact airside electronics inside our aircraft to the ground control hardware. You will take released schematics from our design engineers and own everything downstream: layer stackup, placement, controlled-impedance and RF routing, flex and rigid-flex interconnect, and the complete fabrication and assembly drawing package. You will also own our Altium library and the design standards the rest of the team works inside, which means the manufacturability and reliability of every board we ship starts with your work.

Responsibilities
  • Own PCB layout on assigned designs from released schematic through fabrication release, including board outline, layer stackup definition, component placement, routing, and design rule closure
  • Read and interpret schematics from the design engineers and apply the layout practices appropriate to each design
  • Own the Altium library: footprints, schematic symbols, land patterns, 3D component bodies, design rule and board templates, output jobs, naming conventions, and revision control
  • Implement high-speed digital, RF, precision analog, and power sections on the same board, applying controlled impedance, differential pair and length matching, and disciplined return path design
  • Design flexible and rigid-flex circuits, including bend area construction, stiffeners, coverlay, and ZIF terminations
  • Produce complete fabrication and assembly documentation to IPC Class 2 and Class 3, including fab and assembly drawings, Gerber X2 or ODB++, NC drill, netlists, paste and assembly data, and BOM outputs
  • Work directly with fabrication and assembly vendors on stackup and impedance confirmation, DFM and DFA feedback, and resolution of manufacturing issues
  • Establish and maintain the department's PCB design standards, review layouts produced by others, and coordinate external layout resources during design surges

You should have the following
  • 7+ years of dedicated printed circuit board layout and design experience on hardware that reached production
  • Expert proficiency with Altium Designer, including workspace and library management. Recent version experience preferred
  • Demonstrated personal ownership of a company or corporate CAD library: creating and maintaining footprints and symbols, deriving land patterns, and enforcing naming and revision standards across a design team
  • Boards and drawing packages designed to IPC standards, including IPC-2221 and IPC-2222 for design, IPC-6012 Class 2 and Class 3 for board qualification, IPC-A-610 and J-STD-001 for assembly acceptability, and IPC-7351 for land patterns
  • Flex and rigid-flex design experience, including bend area construction, stiffeners and coverlay, designed per IPC-2223 and qualified to IPC-6013
  • RF and high-speed digital layout expertise: transmission line theory and topology selection (microstrip, stripline, coplanar waveguide), controlled impedance, differential pairs, length and skew matching, reference plane and return path integrity, and via strategy
  • Experience defining layer stackups and closing impedance calculations directly with fabrication vendors
  • Fluency producing and releasing complete manufacturing output packages, with a track record of first-pass fabrication and assembly success
  • A degree in electronics or electrical engineering, or an equivalent depth of hands-on layout experience in place of a degree. We care about the boards you have shipped, not the credential
  • Ability to work onsite at our Torrance headquarters, and eligibility to work with export-controlled technical data as a U.S. person

Nice to Have
  • Altium 365 or Concord Pro workspace administration, managed components, and revision control of ECAD data
  • IPC CID or CID+ certification
  • ECAD to MCAD co-design with SOLIDWORKS or Creo, including STEP model exchange and enclosure fit checks before prototype
  • Signal and power integrity analysis exposure, such as HyperLynx, Ansys SIwave, or field solver based stackup and impedance tools
  • HDI construction, sequential lamination, microvias, via-in-pad, back-drilling, high layer count (greater than 16) and thicker board stackups
  • UAV, avionics, defense, medical, or other high-reliability applications where vibration, thermal extremes, and field reliability drive layout decisions
  • Scripting or automation of repetitive CAD and library tasks

US Salary Range

$115,500 - $162,000 USD

The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are considered part of Neros' total compensation package.

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