This role follows a hybrid work schedule and you will report to the Senior Staff Silicon Engineer.
You will:- Work with researchers and architects to translate high level requirements into hardware features
- Specify and design microarchitectures to deliver world class ML performance
- Perform power, area and performance exploration and optimization of digital ASIC designs
- Design high performance execution units, arithmetic circuits and programmable engines
- Work with verification teams to guarantee functional correctness and performance
You have:- BS degree in Computer Engineering or equivalent practical experience
- 5+ years of industry experience with SystemVerilog, ASIC RTL design and microarchitecture
- 3+ years designing and specifying microarchitectures of high performance computing cores (CPU/GPU/NPU)
- Fluency in at least one high level programming language such as Python, C++
We prefer:- Experience designing datapath elements of high performance cores (CPU/GPU/NPU)
- Experience working with Chisel (Scala) or other higher-level hardware DSL's
- Working knowledge of machine learning algorithms & how they map to hardware
- Familiarity with Synthesis and power analysis tools
- Experience working with formal tools for datapath verification
The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process.
Waymo employees are also eligible to participate in Waymo's discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements.
Salary Range
$175,000-$215,000 USD
