Overview of Role As an IP Alliance Manager you will work with vendors from the TSMC's IP Alliance. Responsibilities include enabling IP vendors to populate the IP Ecosystem on TSMC's technology. You will directly work with IP Vendors on the leading technology from TSMC. You will report to the Deputy Director of the IP Alliance.Additional responsibilities include supporting TSMC's industry events.
The position is open in TSMC's San Jose office where we are currently operatingin a hybrid work schedule with 4 days in office.
Responsibilities - Support and develop the most extensive IP Ecosystem in collaboration with leading IP vendors on TSMC's processes including the most advanced processes and the widest range of specialty processes (RF, BCD, HV, CIS, MEMS, NVM)
- Responsible for the relationship of semiconductor IP vendors that are a part of TSMC's IP Alliance, which can include vendors that provide foundation IP (standard cells, memories, I/O's), Interconnect IP (HBM, 3DIC IP, PCIe, USB,etc.) Analog/MS (PLLs, DLLs, Sensors, ADCs, DACs, etc.); video/audio IP (MIPI, DSP), and automotive IP.
- Provide technical and product support to IP vendors on TSMC processes and technical requirements that IP vendors need to develop IP on TSMC process.
- Support TSMC events including the TSMC Technology Symposium and OIP™ Event.
- Publication support for IP Alliance members for IP on TSMC processes (includes press releases, white papers, web posts, videos, blogs, etc..)
- Work with IP Alliance members, TSMC legal, TSMC9000/IPAE technical team, account teams for key customers, IP Operations, and the shuttle team for IP availability.
- The IP Alliance manager will direct the legal interaction with IP Alliance members and be the interface to TSMC legal for facilitating agreements (NDAs, IP Alliance agreements, Vendor Technology License agreements, authorization letters, etc.)
- The IP Alliance manager will drive corrective actions and follow-up when required.
- Facilitate shuttle access for IP Alliance members and monitor silicon results.
- Monitor IP Alliance members' adherence to the IP Alliance requirements
Minimum Qualifications - MSEE with 12+ years of relevant experience
- Knowledge of IP types including Interconnect IP
- HPM, PCIe, USB, SATA, D2D, HP SerDes
- Foundation IP: standard cells, memories, IOs
- Mixed-signal/Analog IP: PLLs, DLLs, PVT sensors, OSC, ADC, DAC
- Audio/Video IP: MIPI, DSP
- Automotive IP requirements
- Understanding of EDA flows and tech file support required for IP development
- Program management abilities to drive successful IP development with IP Alliance members including meeting tapeout requirements and deadlines
- Excellent communication skills to interact with IP Alliance members, TSMC9000/IPAEs, TSMC legal, OIP (Open Innovation Platform) marketing. Shuttle team, and IP Operations.
Preferred Qualifications - Interface IP design experience - PCIe, USB, Ethernet, Analog/Mixed-Signal, or Foundation IP
- Experience in the asic design flow and/or asic program management
Pay Transparency / Benefits statementAt TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $154,000 and $245,00 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC's total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.
Date: Aug 31, 2026
Country/Region: US
City: San Jose
Company: TSMC Technology, Inc.
