Posting/External Job Title
FPGA Engineer (Senior-Level)
Location
Houston, TX 77058 US (Primary)
Remote/Onsite/Hybrid
100% Onsite
Job Type
Full-time
# of Hires Needed
2
Education
Bachelor's Degree
Travel
None
Security Clearance Required
None
Pay Range (All offers will be based on experience)
$170,000.00 - $264,000.00/yr
Position Introduction/Key Duties
Cimarron is seeking senior-level
FPGA Engineers to support the design, development, testing, and optimization of FPGA-based systems for the Axiom xEVAS spacesuit project in Houston, TX.
Key Duties:- Design and implement FPGA modules and subsystems using VHDL.
- Perform third-party IP core integration and verification.
- Develop configurable, self-checking test benches implemented in VHDL/OSVVM.
- Integrate FPGA design with embedded software, flight software, and peripheral hardware components.
- Optimize FPGA designs for performance, power consumption, and resource utilization.
- Utilize FPGA toolchains such as Xilinx Vivado for synthesis, place-and-route, and timing closure.
- Document design specifications, generate reports, and contribute to peer review sessions.
- Assist in lab testing, system integration, and problem resolution throughout design cycles.
Required/Desired Skills, Experience, and Education
Required Skills, Experience, and Education: - Due to facility security requirements, only U.S. citizens or permanent residents are eligible for consideration at this time.
- Ability to complete a pre-employment background check and drug screening, which will include but is not limited to testing for marijuana use.
- 10 or more years of hands-on FPGA development experience.
- Experience successfully integrating FPGA designs into system-wide hardware/software environments.
- Basic knowledge of embedded C/C++, SoC integration, and bus protocols (UART, SPI, I2C, I2S).
- Ability to deliver high-quality VHDL modules and verification environments.
- Willingness to work evenings and weekends as needed to meet critical project milestones.
- Bachelor of Science (or higher) in Electrical Engineering.
Desired Skills, Experience, and Education: - Experience in ASIC design, DSP, or communication systems.
- Prior exposure to high-speed interface design for RF systems.
- Knowledge of Verilog.
- Experience with simulation and verification tools such as ModelSim, ISE Simulator, or equivalent.
- Prior experience with verification frameworks (UVM, OSVVM, OVM, etc.)
- Expertise in synchronous and asynchronous digital design, pipelines, finite-state machines, and FPGA architecture.
- Experience working with memory-mapped and stream interfaces (AXI-4, Avalon, AXI-Stream).
- Experience with the development of high-speed interfaces using Gigabit Transceivers (ex., PCIe, Ethernet, DisplayPort).
- Proficiency with hardware debugging tools, including logic analyzers, oscilloscopes, and timing analysis.
- Understanding of FPGA constraints, timing closure, and synthesis directives.
Resumes should list employment dates in month/year format (e.g., January 2020 - March 2024) for each position to meet customer and contract documentation requirements.
