Because this role involves a combination of collaborative/in-person and independent work, it will take the form of a hybrid work format, with time split between working onsite and remotely.
Our Manassas, Virginia team has an opening for a microelectronics hardware engineer to develop the most advanced ASICs to support our Electronic Systems sector. We are seeking team players with strong interests in implementation (physical design, synthesis, constraints, etc.).
You would be a member of the team whose products have been deployed in commercial, civil and national security space missions; including GPS, weather monitoring, satellite TV and radio, exploring the universe; most notably the Mars rovers, Spirit and Opportunity. Additional work opportunities would include electronic warfare technology to deliver superior situational awareness, even in the most complex battlespace - defeating threats long before they can be seen. With this job, you will have the opportunity to be an integral part of developing hardware from concept to deployment.
This position will be posted for at least 5 calendar days. The posting will remain active until the position is filled, or a qualified pool of candidates is identified.
Required Skills and Education- Bachelors degree in Electrical or Computer Engineering
- 8+ years industry experience in ASIC development
- ASIC implementation experience to include:
- Physical Design
- Static Timing Analysis
- EMIR
- Layout (DRC/LVS)
- Knowledge of revision control (git, cvs, clearcase, perforce, etc.)
- Ability to script in TCL and Perl or Python
- Experience with Linux or Unix systems
- Current Security Clearance (Secret), or eligibility to obtain one
Preferred Skills and Education- Masters degree in Electrical or Computer Engineering
- 14+ years industry experience in ASIC development
- Ability to lead an entire team on a design effort
- Strong written and oral communication skills
- Self-starter and a good team player
- ASIC implementation experience to include:
- Formal Verification
- Synthesis
- Constraints
- DFT insertion
- Experience in:
- Advanced technology nodes <= 5nm (FinFET and Gate All Around)
- Radiation hardened by design (RHBD) or process (RHBP)
- Creation of custom circuit timing libs and EMIR views
- Post silicon debug/test
- EDA tools and flows (Synopsys, Cadence)
