Job DescriptionMinimum $30,000 Sign On Bonus being offered for external hires.US CITIZENSHIP REQUIRED#LI-LB3
The Engineering, Science and Analysis (ESA) Strategic Capabilities Unit comprises the technical talent and organizational leadership that enables the successful delivery of high-impact discriminating technologies for our customers' missions. Our collaborative, cross-functional teams are committed to innovation, integrity, continual learning and strong execution.
What You'll Do:- Apply innovative design techniques to create defense-oriented, cutting-edge electronic systems.
- Work in a fast-paced team environment on a variety of R&D, proof of concept, and production programs.
- FPGA development and digital IP integration for tactical RF, high reliability electronic systems. Assignments include designs which will include SOC architectures utilizing soft-core processors, digital filters, image processing algorithms, and communication interfaces/protocols.
- Design and implement test fixtures including test plans for both chip-level and board level environments and create reusable circuits that can be utilized across multiple projects.
- Maintain a regular and predictable work schedule.
- Establish and maintain effective working relationships within the department, the Strategic Business Units, Strategic Capabilities Units and the Company. Interact appropriately with others in order to maintain a positive and productive work environment.
- Perform other duties as necessary.
On-Site Work Environment: This position requires regular in-person engagement by working
on-site five days each normally scheduled week in the primary work location. Travel and local commute between company campuses and other possible non-company locations may be required.
Working Conditions: - Work is performed in an office, laboratory, production floor, or cleanroom, outdoors or remote research environment.
- May occasionally work in production work centers where use of protective equipment and gear is required.
- May access other facilities in various weather conditions.
Required Skills and Education- BS degree or higher in Engineering or a related technical field is required plus 4 or more years related experience.
- Each higher-level degree, i.e., Master's Degree or Ph.D., may substitute for two years of experience. Related technical experience may be considered in lieu of education. Degree must be from a university, college, or school which is accredited by an agency recognized by the US Secretary of Education, US Department of Education.
- Digital system partitioning and advanced function implementation in FPGAs.
- Solid electronic circuit design and electronic systems background.
- Expertise in VHDL/Verilog and System Verilog.
- Experience with FPGA design tools including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim.
- Ability to work requirements and flow down for system/subsystem/box/board needs.
- Good communication skills, as well as excellent presentation skills.
A security clearance or access with Polygraph is not required to be eligible for this position. However, the applicant must be willing and eligible for submission, depending on program requirements, after an offer is accepted and must be able to maintain the applicable clearance/access.
Preferred Skills and Education- Solid design, documentation and implementation of high-speed digital electronics, FPGAs, and embedded processor systems.
- Experience with OVM/UVM Verification methodologies.
- Experience developing specifications, cost, schedule, and resource requirements for digital/FPGA designs.
- Familiarity with high-speed interfaces (PCI, Ethernet).
- Familiarity with Signal Processing algorithms and DSP techniques.
- Experience with cybersecurity topics/techniques.
- Familiarity with Mentor Graphic Hyperlynx for SI analysis.
- Space or military experience.
This position will be posted for at least 5 calendar days. The posting will remain active until the position is filled, or a qualified pool of candidates is identified.
Multiple positions may be available on this opening.
