KPIT Technologies

Embedded Virtualization Engineer (AUTOSAR Classic, dSPACE VEOS)

KPIT Technologies • $100K — $130K *
Auburn Hills, MI 48326In-Person
Manufacturing & Automotive
Less than 5 years of experience
Today
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Job Overview by Ladders

Qualifications

  • 5-7 years of experience in vECU development and virtualization engineering
  • Expertise in dSPACE toolchain (SystemDesk, VEOS, ControlDesk)
  • Proficiency in C/C++ programming with adherence to MISRA guidelines
  • Deep understanding of AUTOSAR Classic Platform and architecture
  • Experience with low-level debugging using professional debuggers like Lauterbach TRACE32 or PLS UDE
  • Familiarity with Bus Communication protocols (CAN, LIN, I2C)
  • Capability in hardware systems engineering with a focus on microcontroller architectures.

Responsibilities

  • Design and implement complex device drivers (CDD) for AUTOSAR environments
  • Debug and analyze hardware-dependent software issues in virtual and real setups
  • Develop robust peripheral simulation models using the dSPACE toolchain
  • Integrate Level 3 platforms utilizing MATLAB/Simulink along with dSPACE tools
  • Ensure adherence to best practices in software development and testing
  • Participate in team planning activities like daily stand-ups and retrospectives
  • Utilize git and CI/CD tools for effective collaboration and version control.

Benefits

  • Geo Blue PPO and HSA plan
  • MetLife dental and vision insurance
  • Healthcare and dependent care flexible spending accounts (FSA)
  • 401k plan with employer match
  • Company-paid life and long-term disability insurance
  • Employee Assistance Program
  • Paid holidays
  • Employee discounts and perks
  • Gym benefits.
Full Job Description
Job/Position Summary

Responsibilities:

  • Expert in vECU development for Level 1, Level 3, Level3+, Level 4 (use of dSPACE tool chain SystemDesk, VeosPlayer, ControlDesk, ConfigurationDesk).
  • A highly analytical and results-oriented Senior Virtualization Engineer with deep specialization in the design, integration, and debugging of Complex Device Drivers (CDD) within the AUTOSAR Classic Platform.
  • Possesses a rare, cross-disciplinary expertise that bridges high-level software architecture, low-level hardware schematics, and cutting-edge L3 virtualization techniques using dSPACE tools (SystemDesk, VEOS, ControlDesk).
  • A systematic problem-solver adept at deconstructing complex system interactions, diagnosing hardware-dependent software issues in both real and virtual environments, and developing robust peripheral simulation models to enable full software validation
  • Integration of Level 3 Platform using Matlab/Simulink, Axiom, Build Coordinator, dSPACE tools. Expert of Classic Autosar.
  • Expert of RestBus Development (Bus Manger).
  • Understanding C, CPP, python and M scripting.
  • Strong understanding in SW requirement analysis, development, and testing.
  • Ensuring that the best practices are followed. Familiarity with git, GitHub Enterprise, TeamCity and jFrog Artifactory are essential.


Requirements

Foundational Expertise:

  • Programming & Debugging
  • Expert Proficiency in C: Mastery of C for embedded systems, strictly adhering to MISRA guidelines


Low-Level Debugging: Extensive hands-on experience with professional debuggers such as Lauterbach TRACE32 or PLS UDE. This goes beyond simple breakpoints to include:

  • Analyzing register and memory contents in real-time.
  • Tracing instruction execution to find root causes of timing issues or crashes.
  • Inspecting call stacks and task contexts, especially within an AUTOSAR OS environment.
  • Debugging in Virtual Environments: Ability to adapt debugging skills to a virtual platform (e.g., VEOS), understanding the differences and limitations compared to silicon. This involves interpreting simulation logs, tracing virtual signals, and validating software behavior when the underlying hardware is a model


Core Domain: AUTOSAR Classic Platform & Architecture

  • AUTOSAR Architecture Deep Dive: A holistic understanding of the AUTOSAR layered architecture is fundamental.
  • Application Layer (ASW): Ability to analyze software component (SW-C) designs and ARXML descriptions to determine what services or data the ASW requires from the I/O layer (e.g., a specific actuator control or sensor reading). This defines the CDD's required interface.
  • Runtime Environment (RTE): Expert knowledge of how the RTE acts as the communication backbone. The engineer must be able to navigate and debug RTE-generated code to understand precisely how data and events are exchanged between the ASW and the CDD (Rte_Read/Write/Call).
  • I/O Hardware Abstraction (IoHwAb): Understanding when a CDD is used to bypass the standard IoHwAb and MCAL for complex peripherals, and how to manage the interaction between these layers to avoid resource conflicts.


Complex Device Driver (CDD) Specialist:

  • Purpose & Scope: Deep understanding of why a CDD is needed-to handle non-standard sensors/actuators with specific timing, protocols, or power requirements that fall outside the scope of standard MCAL drivers.
  • Integration Interfaces: Expert in how a CDD interfaces with the core system:
  • Scheduler (SchM): For precise, cyclic activation of driver runnables.
  • Interrupts: For asynchronous handling of hardware events.
  • MCAL Modules: For co-managing shared hardware resources like timers (GPT), ports (PORT), or DMA, ensuring no conflict with the standard drivers.


Hardware & Systems Engineering

  • Microcontroller Expertise (Infineon AURIX Family): While the TC389QP is a key target, the skill lies in understanding the architecture of modern multicore microcontrollers.
  • Core Architecture: Knowledge of the TriCore core(s), memory maps, and interrupt system.
  • Peripheral Proficiency: General familiarity with common complex peripherals that are frequent candidates for CDD implementation:
  • Timers (GTM, GPT): For PWM generation, input capture, and time measurement.
  • Communication Controllers (ETH, CAN, LIN): For handling low-level protocol intricacies or time-triggered communication.
  • Analog-to-Digital Converters (ADC): For enhanced or customized sampling sequences.
  • DMA: For high-speed data transfers without CPU load.
  • Hardware Analysis: The critical ability to read and interpret electrical schematics and hardware block diagrams. This is essential to:
  • Trace signal paths from the microcontroller pin to the physical world (sensor/actuator).
  • Understand the electrical characteristics (voltage levels, timing requirements) the CDD must manage.
  • Confirm the direction of data flow (input/output) for each pin.
  • Identify external components (driver ICs, protection circuits) that the software must account for.
  • Specialized Skill: L3 Virtualization & Peripheral Simulation (dSPACE Toolchain)
  • System Architecture for Virtualization: Ability to analyze a complete AUTOSAR project and determine how to best represent it in a virtual environment. This involves understanding which software parts can run natively and which hardware-dependent parts (like the CDD) require simulation.
  • dSPACE SystemDesk: Proficiency in using SystemDesk to create and configure Virtual ECUs (VECUs). This includes importing AUTOSAR artifacts, managing software component mappings, and setting up the structure for the virtual platform.
  • dSPACE VEOS - The Core Skill: Deep expertise in using VEOS as the simulation platform. The key competency is bridging the hardware-software gap:
  • Identifying Hardware Dependencies: Pinpointing specific instructions within the CDD code (e.g., direct register accesses) that will fail or have no effect in a standard simulation because the physical hardware is absent.
  • Developing & Integrating Simulation Models: Designing and implementing behavioral models of peripherals. This means creating a virtual representation of the hardware (e.g., a GTM timer, a communication controller) that "responds" to the CDD's register reads/writes as the real silicon would. This can be done within VEOS using its C/C++ API or by integrating models from other tools (e.g., Simulink).
  • Signal Injection & Observation: Using VEOS to inject virtual sensor signals and observe the CDD's resulting outputs (e.g., virtual PWM signals, SPI messages) to validate its logic in a closed-loop manner.
  • dSPACE ControlDesk: Using ControlDesk as the experimentation interface to interact with the running VECU, create virtual instrument panels for test automation, and visualize both software variables and simulated hardware signals in real-time.


Key Behavioral Competencies

  • Having domain knowledge in Powertrain domains.
  • Utilize git, GitHub, TeamCity, jFrog Artifactory for pipeline release.
  • Must be able to understand virtual simulation (SIL and/or HIL environments).
  • Good to have dSpace tools experience.
  • must have familiarity with Bus Comm protocols (CAN/LIN/I2C/CAN FD/Eth LAN)
  • Participate in daily stand-ups, sprint planning, and retrospectives.


Soft Skills:

  • Ownership and responsibility skills
  • Effective communication skills
  • Strong critical thinking skills
  • Ability to work independently and in a team-oriented, collaborative environment.


Compensation and Benefits:

Along with competitive pay, as a full-time KPIT employee, you are eligible for the following benefits:

  • Geo Blue PPO and HSA plan
  • MetLife - Dental and Vision plan
  • Healthcare and Dependent care flexible spending account(FSA)
  • 401k with employer match
  • Company-paid Basic Life and Long-term disability insurance
  • Voluntary benefits include Critical Illness, Hospital indemnity, accident insurance, theft, and legal service
  • Employee Assistance Program
  • Paid Holidays
  • Employee discounts and perks
  • Gym benefit


ESSENTIAL SKILLS /COMPETENCIES
• ECU Development
• DSPACE
• AUTOSAR
• CI/CD
• Matlab/Simulink

PREFFERED SKILLS /COMPETENCIES
• Git/GitHub
• TeamCity
• jFrog Artifactory
• Python scripting

About KPIT Technologies

KPIT Technologies Limited is an Indian multinational corporation headquartered in Pune, Maharashtra, India. The company provides software solutions to the automotive, manufacturing, energy and utilities, and life sciences industries. KPIT has more than 60 patents and has won several awards for its innovative solutions. The company has a global presence with offices in 15 countries and has partnerships with several leading technology companies. KPIT is listed on the National Stock Exchange of India and the Bombay Stock Exchange.
Learn more about KPIT Technologies
Size
12,000 employees
Industry
Information Technology
Founded
1990
* Ladders Estimates

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