Edge ML Software Engineer: System Modeling- PICO- San Jose

ByteDance

$218K — $480K *
Consumer Technology
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree in Computer Science, Electrical Engineering, or related field required; equivalent experience accepted.
  • 3+ years in computer architecture and electronic system modeling required.
  • Strong understanding of computer architecture fundamentals needed, including cache and DMA concepts.
  • Proficient in C/C++ and System C programming languages is a must.
  • Preferred: 5+ years relevant experience in the industry and expertise in ML accelerator modeling.
  • Preferred: Background in performance bottleneck analysis and architectural strategy.

Responsibilities

  • Develop transaction-level models of edge NPU architectures focusing on accuracy and representing ML workloads.
  • Analyze machine learning model requirements such as compute intensity and memory bandwidth.
  • Collaborate with compiler and algorithm teams to optimize workloads for performance targets.
  • Simulate execution of representative ML workload models including CNNs and Transformers to assess effectiveness.
  • Generate actionable insights from performance bottleneck analyses to guide architectural improvements.

Benefits

  • Medical, dental, and vision insurance available from day one.
  • 401(k) savings plan with company match for retirement planning.
  • Paid parental leave and short/long-term disability coverage provided.
  • 10 paid holidays and 10 sick days annually, plus 17 days of personal time off.
  • Comprehensive life insurance and wellbeing benefits offered.
Full Job Description
Responsibilities: - Develop transaction-level models of edge NPU architectures with bit accuracy and approximate timing/power accuracy, which model compute units, interconnects, memory hierarchies, and data movements, to simulate execution of representative ML workloads of both CNNs and Transformers. - Analyze ML model compute intensity, memory footprint and bandwidth requirements, and operator-level latency. - Collaborate with compiler and algorithm teams to optimize ML workload for latency, memory and power targets. Qualification Minimum Qualifications - Bachelor's degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience. - 3+ years of industry experience in computer architecture and electronic system modeling. - Strong understanding of computer architecture concepts: memory, cache, DMA, tiling, vectorization, systolic array, etc. - Strong C/C++ and System C proficiency. Preferred Qualifications - 5+ years of relevant industry experience. - Experience building analytical performance and power models for ML accelerators. - Experience analyzing performance bottlenecks and generating actionable architectural recommendations. Job Information 【For Pay Transparency】Compensation Description (Annually) The base salary range for this position in the selected city is $218400 - $480000 annually. Compensation may vary outside of this range depending on a number of factors, including a candidate's qualifications, skills, competencies and experience, and location. Base pay is one part of the Total Package that is provided to compensate and recognize employees for their work, and this role may be eligible for additional discretionary bonuses/incentives, and restricted stock units. Benefits may vary depending on the nature of employment and the country work location. Employees have day one access to medical, dental, and vision insurance, a 401(k) savings plan with company match, paid parental leave, short-term and long-term disability coverage, life insurance, wellbeing benefits, among others. Employees also receive 10 paid holidays per year, 10 paid sick days per year and 17 days of Paid Personal Time (prorated upon hire with increasing accruals by tenure). The Company reserves the right to modify or change these benefits programs at any time, with or without notice.

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