Job Requirements What You will Do:• Build State of Art Verification environment for IP,SS,SOC raning from Automotive to AI chips
• Lead verification team and execution of different projects to completion
• Hands on work in building verificaiton environment involving processors, high speed peripheral(PCIe,UCIe,DDR)
• Work with cross functional(PD,DFT,Design,Emulation) team to resolve issue
• Responsible for DV deliverables and DV closure meeting the required metrics like code coverage, functional coverage
What You Will Bring:- 10+ YOE DV experience.
- Good hands on knowledge of SV-UVM
- Experience in leading team
- Experience in building environment, verification plan, test plan
- Experience in building re-usable verification environment for SS, SOC
- Experience with integrating third party VIP
- Python script expertise
- Use of Source Control like git or equivalent
- Hands on exp of at least on high speed protocol UCIe/PCIe5+/LPDDR5+/Ethernet200G+
- GLS exp
- Arm Core/C-Base exp
- Emulation exp plus
- Multiple high speed protocol exp plus.
Pay Range: $150K to $190K
Compensation decisions are made based on factors including experience, skills, education, and other job-related factors, in accordance with our internal pay structure. We also offer a comprehensive benefits package, including health insurance, paid time off, and retirement plan.
Work Experience - Verilog
- SV-UVM
- Python
- Arm-Core/RISC-V
- C
- High speed protocol such as UCIe/PCIe5+/LPDDR5+/Ethernet200G+
- AMBA protocol
- Verifcation environment setup exp at SS/SOC level
- Planning execution of entire project
- Integrating and using third party VIP
- Excellent communication skill and work in global environment
