ITAR Notice: This role involves access to ITAR-controlled information. Applicants must be U.S. persons (U.S. citizens, U.S. permanent residents, asylees, or refugees) per 22 CFR 120.62.
About the roleCreate a brand new Architecture for DFX that will redefine the industry standards. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out.
What you'll do- Create a brand new Architecture for DFX that will redefine the industry standards
- Own Block and SOC-level DFT, DFM, DFX for our AI accelerator silicon and system
- Use and develop AI-assisted tool flows to accelerate DFX and timelines
What we're looking for- Exceptional abilities in creating specifications, architecture, debug flows, and automation across full-chip DFX of complex SOCs
- Master's + 12 years of experience in full-chip DFT, ATPG, DFX , emulation, and debug for test logic closure of complex SOCs
CompensationFinal offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.
Visa SponsorshipDensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.
Export ControlsAspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.
Full compensation packages are based on candidate experience and relevant certifications.
California pay range
$230,000-$350,000 USD