General Summary:Role OverviewWe are seeking a highly motivated validation engineer with strong debugging and firmware development skills to support next-generation SoC platforms. This role spans
pre-silicon verification, emulation, and post-silicon validation, with a focus on
deep debug in RTL/Verilog environments and hands-on silicon bring-up.
The ideal candidate will bridge the gap between design, DV, and system validation by developing firmware in C and ensuring robust functionality across simulation, emulation, and silicon platforms.
Key Responsibilities- Drive end-to-end validation of SoC subsystems (DDR, memory controller, cache, interconnect) across:
- RTL simulation (Verilog/SystemVerilog)
- Emulation platforms
- Post-silicon environments
- Perform deep debug of functional issues including:
- Root-causing failures in RTL simulations and testbenches
- Debugging firmware-driven flows
- Analyzing silicon failures (timing, stability, performance)
- Develop and maintain production quality firmware in C to:
- Manage DDRSS IP sequences through init, frequency and power management.
- Enable bring-up and feature validation
- Exercise system-level use cases
- Support debug and characterization
- Validate firmware across:
- RTL simulation environments
- Emulation systems
- Silicon platforms
- Collaborate cross-functionally with:
- Design (RTL/architecture teams)
- DV teams (testbench and coverage alignment)
- System and silicon validation teams
- Develop tools, debug infrastructure, and automation to improve:
- Validation efficiency
- Data collection and analysis
- Failure triage and turnaround time
Required Qualifications- 6-9 years of experience in SoC validation, design verification, or post-silicon validation
- Strong debug skills in Verilog/SystemVerilog simulation environments
- Experience with firmware development in C for embedded systems
- Hands-on experience with silicon bring-up, debug, and validation
- Experience debugging across multiple platforms (simulation, emulation, silicon)
- Solid understanding of:
- Computer architecture and SoC subsystems
- Memory systems (DDR, cache, interconnect)
Minimum Qualifications:• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Pay range and Other Compensation & Benefits: $140,000.00 - $210,000.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
