Advanced Micro Devices, Inc

DDR PHY AMS Engineer

Advanced Micro Devices, Inc • $120K — $150K *
Boxborough, MA 01719In-Person
Telecommunications & Hardware
5 - 7 years of experience
1 week ago
Job Overview by Ladders

Qualifications

  • 5-7 years of experience in Memory Phys and High-speed I/O design.
  • Proven track record of successful circuit tape-outs and productization.
  • Strong analytical and inventive problem-solving skills.
  • Effective communication and teamwork skills.
  • Ability to manage risks and implement risk mitigation strategies.

Responsibilities

  • Define circuit architecture and design implementation for low power LPDDR PHY blocks.
  • Design high-speed I/O circuits including transmitters and receivers.
  • Collaborate with teams to improve PPA during design porting across nodes.
  • Develop statistical performance models for PHY simulations and optimizations.
  • Document micro-architecture and guide teams in circuit training and verification.
  • Coordinate with various disciplines for optimal design and functionality.
  • Contribute to development flows for improved efficiency and quality.
  • Lead post-silicon characterization and productization efforts.

Benefits

  • Comprehensive AMD employee benefits package.
Full Job Description
THE ROLE:

The candidate will be a Member of the Memory I/O design team supporting the definition, specification, system simulation and implementation of future LPDDR IPs. The focus of the activity will be centered around the circuit architecture and design of critical high-speed analog and digital blocks, definition of algorithms for calibration, equalization and development of abstracted models for link performance simulations.

THE PERSON:

Will have strong experience building Memory Phys and High-speed IOs with track record of multiple successful Tape-out and productization. The candidate will have analytical thinking and inventive spirit in combination with a solid understanding of risks and risk mitigation. Must have strong/effective communication skills and have an enthusiastic team-first mentality

KEY RESPONSIBILITIES:

  • Contribute to the definition of circuit architecture and to the design implementation of various state-of-the-art, low power blocks, and area efficient circuits for LPDDR PHY
  • Design circuits for High Speed IOs that include Transmitter, Receiver - CTLE/DFE, Delay Lines, DAC, OpAmp, Comparator and voltage regulators
  • Work closely with other teams to port design to different nodes while improving the overall PPA from previous generation
  • Develop models for link-level statistical performance simulation of the PHY (Link Training, PHY, DRAM, DB/RCD, DFE training, Transmit Equalization) and application of the same to the development and optimization of design.
  • Documentation of the micro-architecture and algorithms, and guidance of Analog, Digital, Firmware and Verification teams on the training and verification of the circuits.
  • Work closely with various disciplines, especially Analog Mixed Signal design, Digital Design and Firmware, as well as Design Verification to ensure optimal implementation of the overall PHY architecture and algorithms and full coverage of the features
  • Participate and contribute to the definition of development flows that improve efficiency and quality of execution
  • Lead design liaison for post Silicon characterization and productization/volume production efforts


PREFERRED EXPERIENCE:

  • A proven successful track record in circuit-architecture and modeling for High Speed Ios
  • A proven track record of leading junior engineers to deliver complex circuits
  • Solid and hands-on knowledge of algorithms and equalization/calibration/clocking techniques for high-speed circuit design.
  • Solid knowledge of industry-standard tools and best-in-class practices for PHY modeling, both in terms of abstracted models (e.g. Matlab/Simulink) as well as Verilog/AMS-based.
  • Good knowledge of IO and system integration (signaling/equalization techniques, signal integrity, power integrity).
  • Ability to dig into RTL or FW code supporting the custom circuit implementation


ACADEMIC CREDENTIALS:
  • Bachelor's or master's degree in computer engineering/Electrical Engineering


LOCATION: Boxborough, MA ( open to other AMD locations )

This role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance.

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Learn more about Advanced Micro Devices, Inc
Size
15,500 employees
Market Cap
$100.9 billion
Industry
Manufacturing & Automotive
Net Income
$2.4 billion
Founded
1969
5 Year Trend
+30.9%
Revenue
$9.7 billion
NASDAQ
AMD
* Ladders Estimates

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