Job Description

You will be the Senior ASIC & FPGA Design Engineer for the Multi Domain Missile Warning Payload team. Our team creates large format, high frame rate imaging sensor systems that provide survivability enhancing situational awareness for air, space and surface platforms.

What You Will Be Doing
As the Senior ASIC & FPGA Design Engineer you will work side by side with a PLD subject matter expert to architect, design and implement programmable logic solutions for the imaging sensor system. You will integrate hardware, develop test plans and verify performance on demanding space based platforms, contributing to a scalable, high performance missile warning payload. Your responsibilities will include:
• Define architecture and design specifications for programmable logic components, develop and document RTL (VHDL/Verilog/SystemVerilog) gate level designs that meet performance, power, and reliability requirements.
• Create synthesis, place and route, and timing closure strategies to ensure deterministic operation.
• Generate comprehensive test plans, simulation models, and verification environments (UVM, SystemC, Python based test benches) to validate functional correctness and timing margins.
• Work closely with systems, mechanical, and software teams to integrate ASIC/FPGA solutions into the missile warning payload, ensuring compliance with interface, mass, and volume constraints.
• Contribute to the creation and maintenance of design documentation, configuration management files, and version controlled repositories (e.g., Git).

Further Information About This Opportunity:
This position is in Orlando. Discover more about our Orlando, Florida location.

MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance. A company-sponsored Interim Secret is required to start.

Basic Qualifications

Bachelor's degree or higher in Electrical or Computer Engineering.

Relevant experience with FPGA design and simulation verification.

Minimum 2 years with Xilinx/AMD Vitis and Vivado toolsets.

At least 2 years of hands-on experience using the Xilinx/AMD UltraScale design methodology.

2+ years working with AXI, Ethernet, TCP/IP, and PCIe specifications.

2+ years developing embedded C/C++ applications using Xilinx/AMD Vitis.

Minimum 2 years using Xilinx/AMD Vitis HLS tools.

2+ years of coding in Verilog, SystemVerilog, or VHDL.

At least 2 years of practical laboratory debug experience.

2+ years operating high-speed oscilloscopes, spectrum analyzers, and pulse generators.

Minimum 2 years using Xilinx/AMD Vivado for FPGA debugging.

4+ years of experience with Linux/UNIX, including writing shell scripts (BASH, csh), Perl, and/or Python.

Desired skills

Strong communications, collaboration, and presentation skills.

LM design experience.

Missile experience.

MSEE or MSCE would be a plus.

Experience with SystemVerilog, Verilog, C/C++, MATLAB/Simulink, and SystemVerilog languages; Synopsys Synplify, Synopsys VCS, NCSim, ChipScope tool sets desired.

Experience with Xilinx/AMD and MicroSemi/Microchip part families, internal FPGA fabric and IP.

FPGA design experience using the tools noted above.

Previous experience related to aerospace design techniques would be a plus.

Prior experience with Lockheed Martin MFC is a plus.

Experience implementing NSA algorithms (e.g., AES, counter mode, etc.).

Experience managing configuration control (GitLab preferred).

Experience with Vivado and Vitis FPGA toolsets.

Experience with UVM.

Experience with Simulink and HDL Coder.

Comfortable using digital oscilloscopes, spectrum analyzers, power meters, signal generators, and other test equipment.

Experience with troubleshooting and debugging at board level, including FPGA validation.

Experience in ASIC/FPGA life-cycle (architecture, design, simulation, verification, validation, integration & test).

Other Important Information

By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings.

Ability to work remotely

Part-time Remote Telework: The employee selected for this position will work part of their work schedule remotely and part of their work schedule at a designated Lockheed Martin facility. The specific weekly schedule will be discussed during the hiring process.

Work Schedule Information

Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.

National Pay Statement

Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $101,000 - $178,135. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
(Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
This position is incentive plan eligible.

Premium Pay Statement

Pay Rate: The annual base salary range for this position in most major metropolitan areas in California, Massachusetts, and New York is $116,200 - $201,365. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
This position is incentive plan eligible.