We are building next-generation 50G/100G optical link solutions for data-centric computing, leveraging advanced silicon photonics integrated with cutting-edge CMOS electronics. We're looking for a highly skilled Senior AMS Design Engineer to architect and implement high-speed analog and mixed-signal circuits for our photonic transceivers and electronic ICs (EICs). You’ll work closely with a multidisciplinary team across photonics, system, packaging, and validation to deliver scalable, low-power, high-performance EICs for optical compute and interconnects. What You Can Expect • Top-down architectural analysis of AMS systems. • Develop understanding of the digital and photonics subsystem and associated requirements on the AMS sub system. • Utilize knowledge general concepts of high-performance analog design and compare various topologies that best fit the AMS architecture to support AI application requirements. • Enhance system performance using digitally assisted analog techniques and appropriate partitioning of analog and digital circuits. • Drive transistor-level feasibility study for various AMS circuits. • Define design specifications and verification plans. • Define production and bench-level test plans. What We're Looking For • Requires Master’s Degree or PhD in related areas of expertise. • 10+ years of experience AMS Design. • Experience with architecture, design, and production expertise in the following areas: • Architectural investigations and implementation for circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs,ADC etc • Ultra-low-power analog circuits. • Digitally assisted analog circuits. • You should be highly skilled in the following areas: • MATLAB/Simulink/Verilog A modeling. • High speed architectures and design trade-offs • Low-power and high-precision analog techniques. • Architect circuit solutions that achieve challenging noise, linearity, power consumption, and silicon area requirements. • AMS design flows and chip assembly techniques. • Working with design, layout, and production test engineers. • Excellent communication skills are necessary to work with multiple domain experts, such as digital/VLSI, AI/ML, Photonics, and packaging. Expected Base Pay Range (USD) 174,530 - 261,400, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process. Interview Integrity  To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. #LI-TD1