3D Stacked DRAM-on-Logic Design Engineer

SK hynix America

$150K — $260K *
Consumer Technology
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree or higher in Electrical Engineering or a related field with 5+ years of relevant experience.
  • Proven development experience with Digital Logic IP/SoC using Hardware Description Languages (Verilog, VHDL).
  • Skilled in RTL design and implementation for memory PHY and high-speed digital IP.
  • Experience with memory controllers.
  • Familiarity with memory Built-in Self-Test (BIST), DRAM Design for Test (DFT), and Design for Debug (DFD).
  • Strong knowledge of PPA analysis, optimization, and physical design techniques.
  • Excellent verbal and written communication skills in English, capable of conveying technical concepts effectively.

Responsibilities

  • Drive leadership in 3D-stacked DRAM technology through innovative digital IP design.
  • Deliver digital IP services for DRAM-on-Logic system configurations tailored to client needs.
  • Foster technical partnerships with foundry companies to enhance digital IP for 3D-stacked DRAM.
  • Collaborate closely with U.S.-based customers to align innovations with evolving market demands.
  • Engage in advanced design and optimization processes to improve product competitiveness.

Benefits

  • Top-tier health insurance at no employee cost.
  • Generous Paid Time Off (PTO) including Company Holidays and Happy Fridays.
  • Comprehensive Paid Parental Leave Program.
  • 401k matching to encourage long-term savings.
  • Up to $10,000 per year in educational reimbursement for job-related degrees.
  • Opportunities for donation matching and community volunteering.
  • Exclusive corporate discount programs.
  • Complimentary meals (breakfast/lunch/dinner) provided to employees.
Full Job Description
Job Title: 3D Stacked DRAM-on-Logic Design Engineer
Office Location: San Jose, CA
Job Type: Full-Time
Work Model: Onsite

Job Summary:

To strengthen leadership in the DRAM-on-Logic era through optimized DRAM die design, we are seeking talent capable of driving the co-design of 3D-stacked DRAM logic dies in close collaboration with U.S.-based customers. This strategic hiring initiative aims to enhance our global competitiveness by fostering deep engagement with key American clients, ensuring that our die design solutions are precisely aligned with their evolving technical requirements and market demands.

Responsibilities:
  • Strengthen leadership in the DRAM-on-Logic Era through advanced digital IP design for 3D-Stacked DRAM.
  • Provide digital IP services for 3D-stacked DRAM to enable DRAM-on-Logic system configurations for customers.
  • Establish close technical engagement with foundry companies to build digital IP of 3D-stacked DRAM.

Qualifications:
  • Bachelor's degree or higher in Electrical Engineering or a related discipline with 5+ years of relevant experience.
  • Development of Digital Logic IP/SoC based on Hardware Description Languages (Verilog, VHDL).
  • Experience in RTL design and implementation memory PHY, hard macro IP for high-speed circuit, or high-speed digital IP design.
  • Experience with memory controllers.
  • Experience in memory Built-in Self-Test (BIST), DRAM Design for Test (DFT) / Design for Debug (DFD).
  • Deep understanding of PPA analysis and optimization, and physical design.
  • Excellent verbal and written communication in English; ability to present technical concepts to cross functional teams and senior management.

Benefits:
  • Top Tier health insurance at no employee cost
  • Paid day offs: PTO + Company Holidays + Happy Fridays
  • Paid Parental Leave Program
  • 401k Matching
  • Educational reimbursement up to $10,000 per year for job-related higher education degree
  • Donation Matching and volunteering opportunities
  • Corporate discount programs
  • Free Breakfast/Lunch/Dinner provided to employees

Compensation:

Our compensation reflects the cost of labor across several U.S. geographic markets, and we pay differently based on those defined markets. Pay within the provided range varies by work location and may also depend on job-related skills and experience. Your Recruiter can share more about the specific salary range for the job location during the hiring process.

Pay Range

$150,000-$260,000 USD

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