Champion the next-gen memory architecture strategy, influencing key products across diverse domains including GPUs, automotive, and robotics. Lead cross-portfolio initiatives to drive performance enhancements while mentoring future technical leaders.

The Senior Signal & Power Integrity Engineer will be responsible for developing innovative signal integrity solutions for complex system design challenges. This role involves system-level simulations, modeling, and optimization of high-speed interfaces, as well as collaboration across various engineering disciplines.

Transform the future of memory architecture as a key leader shaping strategies for innovative silicon and systems. Drive performance and power analysis, influence product roadmaps, and cultivate the next generation of technical experts across diverse domains.

Unlock your potential by driving timing analysis and closure for DFT logic across multiple chip platforms. Collaborate with interdisciplinary teams to improve workflows and ensure optimal performance in sophisticated design environments.

Shape the future of memory architecture by defining strategies for DRAM and memory interfaces across diverse domains. Lead innovations impacting datacenters, consumer products, and AI systems while advancing performance and efficiency.