Architect the future of high-performance ASICs, shaping multi-die systems and chiplet-based designs while driving innovation in connectivity and power efficiency. Join a bold team to redefine architecture for next-gen AI and cloud technologies.

Build advanced CAD and EDA tools while collaborating with cross-functional teams to streamline physical verification processes and enhance IC design methodologies in semiconductor manufacturing.

The Senior Principal Digital IC Design Engineer at Marvell will be responsible for shaping the micro-architecture of chips and implementing designs using low-power RTL coding techniques. This role involves collaboration with various teams to ensure the successful development of state-of-the-art datacenter and AI SOCs.

Transform cutting-edge technologies into advanced ATE test solutions. Lead NPI test engineering, collaborate with cross-functional teams, and optimize test flows for next-gen products, driving innovation in high-speed testing hardware.

Innovate and verify cutting-edge SoC and IP designs in high-performance computing, ensuring correctness and scalability while leading cross-functional teams through advanced verification methodologies and strategies.