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X In most instances, this position requires in-person interviews as part of the hiring process.
Minimum qualifications: - Bachelor's degree in Electrical Engineering or a related field, or equivalent practical experience.
- 10 years of Analog Mixed Signal IP design experience in the area of High Speed IP like LPDDR, PCIe, USB.
- Experience in Execution Management of AMS IP.
Preferred qualifications: - Master's degree or PhD in Electrical Engineering or a related field.
- Person has development experience of PLLs, Oscillators, along with High speed Parallel and Serial IOs.
- Person has LPDDR5 and PCIGen5 development experience.
About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
As a part of this role, the person will engage multiple vendors Analog Mixed Signal IP like PLLs, Serial IO, LPDDRs etc in the cutting edge process technology. In this role, the person will evaluate risk associated with IP such as quality, competitiveness, silicon health, integration, IP delivery timeline management, and issues resolution related to IP. In this role, the person will also hold regular engagement with external vendors and internal lead to develop current and future requests, availability, timeline etc.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $192000 - $278000 (USD) 20% bonus target equity benefits
Learn more about benefits at Google .
Responsibilities - Lead external IP selection for our SoCs.
- Track internal IP development progress, resolve issues, and drive mitigation plans.
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