Rivian

Sr. Staff ASIC Verification Engineer

Rivian$237K — $296K *
Telecommunications & Hardware
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • 10+ years of ASIC design verification experience from concept to tape-out.
  • BS/MS or PhD in Electrical or Computer Engineering.
  • Deep understanding of Computer Architecture, including memory hierarchies (Cache, DMA, DDR/HBM) and interconnect protocols (NoC).
  • Experience with low-power design verification (UPF/CPF).
  • Familiarity with specialized hardware like Systolic Arrays, Vector Processors, or Neural Processing Units (NPUs) is a plus.

Responsibilities

  • Drive end-to-end functional and performance verification of AI accelerator architectures, ensuring numerical integrity and dataflow.
  • Leverage SystemVerilog/UVM for Coverage-Driven Verification (CDV) to meet functional targets.
  • Apply Formal Verification (SVA) to prove corner cases in safety-critical components.
  • Strategize and implement LLM-augmented workflows for Front End Development.
  • Develop verification plans compliant with ISO 26262 standards and conduct Fault Injection Analysis (FIA).
  • Collaborate with firmware teams using Emulation and FPGA prototyping for software testing.

Benefits

  • Comprehensive healthcare coverage including life, medical, dental, and vision insurance.
  • Paid vacation and sick leave for all employees.
  • 401(k) Plan and Employee Stock Purchase Program opportunities available.
  • Full-time employee coverage begins on the first day of employment.
  • Flexible benefits for part-time employees after 90 days.
Full Job Description
Role Summary

We are seeking a high-caliber Sr. Staff Verification Engineer to join our ADAS and Inference Silicon team. You will be responsible for the end-to-end functional verification of our next-generation SoC.

Responsibilities

  • Drive end-to-end functional and performance verification of AI accelerator architectures: Ensure bit-accurate numerical integrity and high-bandwidth dataflow for production-scale CNN and Transformer workloads.
  • Verification Methodology: Leverage SystemVerilog/UVM for Coverage-Driven Verification (CDV) to reach aggressive functional targets. Apply Formal Verification (SVA) to exhaustively prove corner cases in safety-critical arbiters, state machines, and concurrency logic where simulation falls short.
  • Advanced Methodologies (nice-to-have): Strategize and Implement LLM-augmented workflows for Front End Development.
  • Safety-Critical Verification (nice-to-have): Develop and execute verification plans compliant with ISO 26262 standards. Conduct Fault Injection Analysis (FIA) to verify safety mechanisms (ECC, Parity, BIST).
  • Hardware-Software Co-Verification (nice-to-have): Collaborate with firmware teams using Emulation and FPGA prototyping to run full-stack software.

Qualifications

  • Experience: Typically 10+ years of industry experience in ASIC design verification. Engineers who have seen multiple chips from "concept to tape-out."
  • Education: BS/MS or PhD in Electrical Engineering or Computer Engineering.
  • Hardware Knowledge:
    • Deep understanding of Computer Architecture.
    • Memory hierarchies (Cache, DMA, and DDR/HBM).
    • Interconnect protocols (NoC - Network on Chip).
    • Low-power design verification (UPF/CPF).
  • Bonus Skills / Experience:
    • Specialized hardware like Systolic Arrays, Vector Processors, or Neural Processing Units (NPUs).
    • Understanding of how CNN and Transformer networks map to hardware.
    • Compilers and toolchains

Pay Disclosure

The salary range for this role is $237,000 - $296,000 for Palo Alto based applicants. This is the lowest to highest salary we in good faith believe we would pay for this role at the time of this posting. An employee's position within the salary range will be based on several factors including, but not limited to, specific competencies, relevant education, qualifications, certifications, experience, skills, geographic location, shift, and organizational needs. The successful candidate may be eligible for annual performance bonus and equity awards.

We offer a comprehensive package of benefits for full-time and part-time employees, their spouse or domestic partner, and children up to age 26, including but not limited to paid vacation, paid sick leave, and a competitive portfolio of insurance benefits including life, medical, dental, vision, short-term disability insurance, and long-term disability insurance to eligible employees. You may also have the opportunity to participate in Rivian's 401(k) Plan and Employee Stock Purchase Program if you meet certain eligibility requirements. Full-time employee coverage is effective on their first day of employment. Part-time employee coverage is effective the first of the month following 90 days of employment. More information about benefits is available at rivianbenefits.com.

You can apply for this role through careers.rivian.com (or through internal-careers-rivian.icims.com if you are a current employee). This job is not expected to be closed any sooner than April 30, 2026.

About Rivian

Rivian is an American automaker and automotive technology company. Founded in 2009, the company develops vehicles, products and services related to sustainable transportation. Rivian has raised over $10.5 billion since 2019, with investments from Amazon, Ford, and Cox Automotive. The company's first two vehicles, the R1T and R1S, are electric vehicles that are expected to be released in 2021. Rivian has also announced plans to produce electric delivery vans for Amazon. The company has received praise for its focus on sustainability and its commitment to using recycled materials in its vehicles.
Learn more about Rivian
Size
10,000 employees
Market Cap
$16.8 billion
Industry
Founded
2009
NASDAQ

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