The Role:
As a Sr. RF and Wireless Systems Engineer in the Digital RF Systems team, you will be responsible for RF architecture definition, RF line-up design, and RF specifications of custom ASICs used in Leo phased array systems.
You will work closely with RFIC and DSP designers during the design phase, participating in RFIC design reviews to ensure optimal system-level RF performance.
You will use MATLAB, ADS and other simulation tools to model RF impairments of the chips and analyze complex phased array system and sub-system interactions. In post-silicon, you will be involved in prototyping, defining RF DVT lab test requirements to validate designs. You will support production teams through statistical analysis and yield optimization in cross-functional collaboration with manufacturing engineers.
You will develop novel techniques to estimate and correct RF impairments such as IQ imbalance, LOFT implemented in hardware and firmware. Based on system-level constraints such as low power and cost, you will develop optimized solutions to support high throughput for our customers. You will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions, working closely with internal teams including ASIC/RFIC designers, firmware/software engineers, and design verification engineers. You will drive key aspects of wireless product design identifying ASIC level specifications from the product requirements.
Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
Key job responsibilities
- Own end-to-end RF architecture and line-up design for the Leo RFICs and phased array communication systems used in the satellites and customer terminals
- Define RF specifications, key performance requirements for custom ASIC development
- Simulate and characterize RF impairments impact on the system
- Review RFIC designs for compliance with system performance targets
- Research and implement calibration and correction algorithms for RF front-end impairments
- Involve in lab validation plans for post-silicon RF characterization
- Identify and resolve RF performance bottlenecks through measurements and analysis
- Balance power, cost, and throughput trade-offs to meet product requirements
- Support ASIC production data reviews to drive yield improvements with manufacturing engineering
- Serve as the RF systems point of contact across silicon design, firmware, software, and test teams
BASIC QUALIFICATIONS
- Master's degree or Ph.D. degree in Electrical Engineering or related field
- 7+ years of relevant experience in wireless DSP/RF systems engineering (LTE, 5G-NR, WiFi 802.11, BLE)
- In depth knowledge of RF architectures and design for low power consumption RFIC and ASIC
- Solid understanding of RF blocks and components, RF simulation tools
- Experience in RF impairment estimation and compensation techniques
- Working knowledge of FW implementation of various DSP algorithms for RF impairment compensation
- Experience in using lab equipment, bring-up and validation of chip
- Experience with MATLAB, Python and/or C/C++ for fixed point DSP algorithm development, RF impairment modeling and simulation
- MSEE/PhD is highly preferred with emphasis on RF systems, mmWave RFIC designs
PREFERRED QUALIFICATIONS
- Strong background in RFIC design process
- Digital/Wireless Communication Systems and engineering
- Experience in designing low power/area digital signal processing blocks for Wireless RF SOCs
- Excellent understanding of RF architectures and blocks used in the Wireless SOCs
- MATLAB, Python, C++ experience with emphasis on fixed point modeling of DSP blocks, RF impairment modeling, RF calibration algorithm development, system performance simulations (EVM, ACLR, OOB emissions)
- Familiarity with phased array systems and phased array performance optimization techniques
- Experience in silicon bring-up in the lab and using lab equipment such as vector spectrum analyzer, signal generators, high speed scopes and logic analyzers
- Proficiency in Ansys HFSS and Keysight ADS simulation tools
The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.
USA, CA, San Diego - 159,200.00 - 215,300.00 USD annually
USA, WA, Redmond - 159,200.00 - 215,300.00 USD annually
