Minimum qualifications:- Bachelor's degree, or equivalent practical experience.
- 8 years of experience in software development using C and C .
- 3 years of experience working with embedded systems and embedded operating systems.
- 3 years of experience in a technical leadership role.
- 2 years of experience in a people management or team leadership role.
- Experience with test design.
Preferred qualifications:- Master's degree or PhD in Computer Science, or a related technical field.
- 3 years of experience working in a complex, matrixed organization.
- Experience developing robust test content for complex chips and hardware systems.
- Experience working with large, multi-die accelerators, including familiarity with key technologies such as HBM/DDR memory, PCIe or high-speed interfaces, or ARM/RISC-V architectures.
- Expertise in embedded software or ASIC firmware development using C and C .
About the jobWith technical and leadership expertise, you manage engineers across multiple teams and locations, a large product budget and oversee the deployment of large-scale projects across multiple sites internationally.
The TPU Platform Enablement and Silicon Validation team develops the critical software required for chip functionality and performance validation in both pre- and post-silicon environments.
As a Software Engineering Manager, you will lead a group focused on building the software and test content necessary for validating our cutting-edge chip and hardware systems.
Responsibilities- Lead and manage the team responsible for TPU development and Silicon Validation by setting clear priorities, providing coaching and performance feedback, and aligning team strategies with broader organizational goals.
- Define the technical roadmap, guide complex system designs to solve ambiguous problems, and uphold engineering best practices through code reviews and architectural oversight.
- Oversee the development of comprehensive test frameworks, core test generators, and IP test content required to drive pre- and post-silicon ASIC validation across simulation, emulation, and silicon environments.
- Direct the creation of critical simulation and modeling tools (GRM and ISS), embedded firmware/software for test boards, and innovative tests and coverage analysis methodologies to maximize hardware stress testing.
- Collaborate seamlessly with chip, hardware, system, and software engineering teams to debug complex issues and comprehensively validate chip and system features.
Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $207000 - $301000 (USD) 20% bonus target equity benefits
Learn more about benefits at Google .
