SOC Micro-Architect and RTL Designer

MatX

• $160K — $500K+*
US-Anywhere
+ 2 other locationsRemote
Consumer Technology
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • 5+ years of experience with SystemVerilog, Python, C/C++, and related programming languages for chip design.
  • Experience in driving silicon design for subsystems and/or top-level functions with ASICs and SOCs.
  • Proven experience with high-performance compute micro-architecture and design concepts.
  • Hands-on experience with design synthesis and related flows for high-quality sign-off.
  • Familiarity with verification, emulation platforms, and methodologies.
  • Experience with DFT and physical design concepts for high test coverage and optimal performance.
  • Bonus: hands-on experience with silicon debug and bring-up.

Responsibilities

  • Contribute to scalable silicon architecture-to-design methodology across multiple blocks and subsystems.
  • Own chip-level silicon design deliverables from micro-architecture to sign-off-ready design.
  • Plan and drive sign-off reviews on micro-architecture and design specifications.
  • Collaborate closely with verification and physical design teams to optimize performance, power, and area.
  • Drive execution towards silicon milestones like design freeze and tapeout.

Benefits

  • 4 weeks of paid time off plus 12 company holidays and up to 3 weeks remote work.
  • Company-subsidized medical, dental, and vision insurance for employees and dependents.
  • 401K with a 5% company contribution, and additional financial wellbeing offerings.
  • $1500 annual professional development budget.
  • On-site meals provided Monday to Friday.
  • 100% reimbursement for daily commute costs.
  • Monthly stipends for personal perks, cellular, and internet.
  • Comprehensive mental health benefits and support for parents including paid leave.
Full Job Description
What You'll Do Here
  • Contribute to MatX's silicon architecture-to-design methodology with a scalable solution across blocks, subsystems, fullchip design
  • Own entire subsystem or subsets and/or chip-level silicon design deliverables from micro-architecture to sign-off ready design
  • Plan and drive intermediate and sign-off reviews on micro-architecture and design specifications, execution progress, area and timing closure towards various silicon milestones including design freeze and tapeout
  • Work closely with the verification, DFT, and physical design co-owners of the subsystem/block in question and deliver best-in-class performance-power-area results

Who You Are
  • Concept-to-silicon experience in driving silicon design for subsystems and/or top-level functions with ASICs and SOCs from an architecture specification to production silicon
  • 5+ years or more experience with SystemVerilog, Python, C/C++ and similar scripting and programming languages for chip design and related flows
  • Production-proven experience on silicon micro-architecture and design concepts used in high-performance compute (CPUs, GPUs, accelerators), high-speed connectivity, memory management and related functionalities
  • Experience with testing your designs and working closely with verification teams towards performance and coverage closure goals
  • Hands-on experience with design synthesis, equivalence checking, design lint, clock-domain-crossing and related flows to take designs to high quality sign-off
  • Experience on DFT and physical design concepts and methodologies to achieve high test coverage and best-in-class timing, power and area for designs working with experts in these areas to take designs to sign-off
  • Familiarity with verification, emulation platforms and methodologies is a plus
  • Hands-on experience with participation in silicon debug and bring-up is a plus
  • This is a hybrid role that will require you to work from our Mountain View, CA office 3 days a week on Tuesday through Thursday

Bonus Points If You Have
  • A huge plus if you have hands-on experience with silicon and firmware implementations of PCIe, HBM, DMA, Die-to-die subsystems.

Compensation

The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job-related skills, and relevant education and training. Career length is only a guideline for compensation.
  • Early Career - $160,000 - $275,000 + equity
  • Mid Career - $175,000 - $400,000 + equity
  • Senior Career - $250,000 - $600,000 + equity

What We Offer
  • Time off: 4 weeks PTO (accrued) + 12 company Holidays + up to 3 weeks remote work
  • Health: Company-subsidized Medical (Kaiser or Anthem) for employees & dependents, Guardian Dental and Vision insurances for employee & dependents, and life insurance (employee only), plus HSA and FSA offerings via Lively.
  • Financial Wellbeing: Choose from Roth IRA or 401K (or both) retirement plans with up to 5% company contribution to 401K (even if you don't contribute). Also, 100% company-paid life insurance (up to $300K) and long-term disability insurances.
  • Professional Development: $1500 Professional Development Budget (per year)
  • Team Meals: MatX provides onsite team lunch & dinner Monday - Friday, with your choice of ordering via WeBox, Specialty's or via our reimbursement system
  • Commute on Us: Commute on our company Uber account, or reimburse your train rides. Either way, we pay 100% for your daily commute.
  • MatX E[x]tras: $50/mo to use on the perk you value most
  • Cell & Internet Reimbursement: $35/mo for cellular and $40/mo for wifi
  • Mental Wellbeing: 100% paid mental health benefit via SpringHealth and Guardian EAP.
  • Support to Parents: Up to 12 weeks paid parental leave regardless of path to parenthood, 10 weeks pregnancy disability leave, flexible return-to-work hours, and Benepass reproductive health & parental benefit.

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