Google

Silicon Design Verification Engineer, Devices and Services

Google • $138K — $198K *
Mountain View, CA 94040In-Person
Consumer Technology
Less than 5 years of experience
Today
Be an Early Applicant
Job Overview by Ladders

Qualifications

  • Bachelor's degree in a relevant field or equivalent experience
  • 4 years of experience with verification components and environments
  • Proficiency in verifying digital logic at RTL using SystemVerilog or C/C++
  • Experience with verifying digital systems using standard IP components interconnects

Responsibilities

  • Plan verification strategies for complex digital designs by collaborating with teams
  • Develop and enhance constrained-random verification environments using SystemVerilog and UVM
  • Write and implement coverage measures for various scenarios
  • Debug tests in partnership with design engineers to ensure correct functionality
  • Close verification coverage measures to identify gaps and document progress

Benefits

  • 15% bonus target equity benefits
  • Access to comprehensive health and wellness programs
  • Professional development opportunities
  • Flexible work arrangements
  • Open and inclusive company culture
Full Job Description
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 4 years of experience creating and using verification components and environments in standard verification methodology.
  • Experience verifying digital logic at RTL level using SystemVerilog or C/C .
  • Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience in low-power design verification.
  • Experience in ARM and RISC-V processor based DV including tool chains and C based testing.
  • Expertise in different verification techniques and methodologies including formal, GLS, UPF based Power simulations, UVM and C based testing, to achieve bug-free Silicon in complex SoCs.
  • Familiarity with scripting languages and software development frameworks.


Responsibilities
  • Plan the verification of complex digital design blocks by fully understanding the design specification and interacting with design verification leads and design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using SystemVerilog and UVM or formally verify designs with SVA and industry leading formal tools.
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Close coverage measures to identify verification holes and to show progress towards tape-out.


US: $138000 - $198000 (USD) 15% bonus target equity benefits

Learn more about benefits at Google .

About Google

Google is a multinational technology company that specializes in Internet-related services and products. These include online advertising technologies, search engine, cloud computing, software, and hardware. Google was founded in 1998 by Larry Page and Sergey Brin while they were Ph.D. students at Stanford University. The company has grown tremendously since then and has become one of the most valuable companies in the world. Google's mission is to organize the world's information and make it universally accessible and useful.
Learn more about Google
Size
156,500 employees
Market Cap
$1,115.4 billion
Industry
Enterprise Technology
Net Income
$40.2 billion
Founded
1998
5 Year Trend
+23.3%
Revenue
$182.5 billion
NASDAQ
GOOGL
* Ladders Estimates

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