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X Note: By applying to this position you will have an opportunity to share your preferred working location from the following:
Mountain View, CA, USA; Austin, TX, USA; Portland, OR, USA; Poughkeepsie, NY, USA.
Minimum qualifications: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 8 years of experience conducting full-stack performance analysis on software systems.
- Experience in one or more of the following three areas: Linux Kernel (processes, threads, scheduling, syscalls, interrupts and exceptions), Toolchains (compilers, JIT compilation and symbolization) or, Android system software stack.
Preferred qualifications: - Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with mentoring and leading team members.
- Experience with new technical territories.
- Ability to be innovative and comfortable with working on issues with ambiguity.
- Ability to be a fast and effective learner.
About the jobBe part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $163000 - $237000 (USD) 15% bonus target equity benefits
Learn more about benefits at Google .
Responsibilities - Perform analysis on complex workloads and kernels to identify performance bottlenecks that others miss.
- Plan and evaluate ARM architecture features, providing data-driven insights that shape future SoC designs.
- Partner with Android workload owners, tool-chain experts, and device teams to implement full-system optimizations.
- Design the benchmarks and modeling methodology that will define the next decade of Hardware/Software co-design.
- Act as a technical pillar for the team, mentoring engineers and driving strategic deliverables.
