Key Responsibilities
Technical Expertise & Design Enablement

Design, analyze, and verify memory, logic, and analog circuits across advanced technology nodes. Own and support major data path blocks including Sense Amplifiers, timing distribution, calibration, and training features. Identify design marginalities and recommend circuit-level or architectural solutions to improve DRAM robustness, yield, and performance.
Technology Development & Product Ramp

Enable new process node startup, qualification, yield learning, and production ramp. Provide technical guidance to Technology Development teams using strong process and device integration knowledge. Develop and track key metrics to assess technology readiness.
Verification, Silicon Bring-up & Yield

Support design verification and validation using CAD tools, modeling, and simulation. Define and execute silicon experiments and debug strategies in collaboration with Product Engineering. Perform electrical failure analysis of DRAM Array Sensing Schemes and lead yield improvement initiatives using statistical analysis.
Layout, Modeling & Optimization

Guide Sense Amp layout activities including floor planning, placement, routing, and layout reviews. Perform parasitic extraction and modeling to optimize signal margin and memory bit interaction of Sense Amps and Wordline drivers. Drive layout-aware optimization decisions to improve scalability and manufacturability.
Cross-Functional Collaboration

Collaborate with Design, Technology Development, DFT, Test, Reliability, Quality, Manufacturing, Probe, Assembly, and Marketing teams. Partner with Applications Engineering to evaluate specifications and balance customer requirements with design and process constraints.
Innovation & Automation

Leverage AI-based tools, automation, and advanced analytics to improve design quality, yield learning, and workflow efficiency. Drive innovation for future memory generations.
Technical Leadership

Document methodologies clearly, present results to technical forums and leadership, mentor junior engineers, and lead complex cross-functional initiatives.

Minimum Qualifications
• Bachelor's degree in Electrical or Computer Engineering or Physics (emphasis on semi electronics) or equivalent.
• Senior: 2-5 years of relevant experience in the following:
• Principal: 8+ years of relevant experience in the following:
• Experience with DRAM, NAND, Logic, or related interfaces.
Preferred Qualifications
• Master's degree in Electrical or Computer Engineering or Physics (emphasis on semi electronics) or equivalent
• Deep understanding of high-speed IO, SI/PI, PDN, CMOS device physics, and BSIM modeling.
• Experience applying AI or automation to engineering workflows.

Strong communication and technical leadership skills.