Join JRC's Semiconductor Technology Team!We are seeking a technically commanding
Senior Manager of Semiconductor Technologies to manage our core development efforts in radiation-hardened microelectronics. Reporting directly to the Vice President of Semiconductor Technologies, this role oversees the strategic direction and technical execution of our next-generation LEAP Standard Cell Library and leads the development of proprietary simulation software for predicting reliability and radiation-induced error rates.
What You'll Do- Mentor, manage, and grow a high-performing multidisciplinary team of device physicists, circuit designers, and software engineers.
- Serve as the subject matter expert on Semiconductor Device Physics for radiation effects, including TID, SEE, and SEU.
- Define the technical strategy and roadmap for Radiation Hardened LEAP Standard Cell Libraries across multiple advanced foundry technology nodes.
- Interface regularly with government and DoW customers, DIB customers and strategic partners, and attend relevant conferences. Contribute to BD pipeline assessments and capture tracking. Provide hands-on assistance with technical content of capture proposals and work seamlessly with the contracts and proposal execution teams.
- Direct the development and enhancement of proprietary software tools used for analyzing circuit reliability and radiation-induced error rates.
- Oversee advanced library characterization and simulations to optimize Power, Performance, and Area (PPA) in harsh environments.
- Manage relationships with external foundry partners to influence Multi-Product Wafer (MPW) execution and interface directly with customers to ensure technical quality control.
What You Bring- Ph.D. in Electrical Engineering, Applied Physics, or a related field with 2+ years of direct industry experience, OR a Master's degree with 6+ years of direct industry experience, OR a Bachelor's degree with 8+ years of experience.
- Must be eligible to obtain a U.S. security clearance due to the nature of defense-related projects.
- Deep foundational knowledge of semiconductor device physics and semiconductor design methodologies and principles.
- Hands-on experience with standard cell design, circuit design, and layout, and associated design tools (e.g. Virtuoso, Spectre, HSPICE)
- Demonstrated experience being involved in test-chip designs and MPW execution.
- Proficiency in design flows including DRC/LVS, timing analysis, and power integrity.
- Extensive experience with semiconductor device & design simulation tools, specifically for library characterization.
- Demonstrated track record of managing or leading engineers for a minimum of 5 years.
- Demonstrated end-to-end track record of steering execution of complex technical projects from initial concept/feasibility phase through completion.
- Outstanding communication and presentation skills
☆Bonus Points- Ph.D. with 5+ years, Master's with 9+ years, or Bachelor's with 10+ years of direct industry experience.
- Proven leadership running and scaling high-performing multidisciplinary engineering teams while owning technical strategy and roadmaps.
- Demonstrated success shaping government-focused proposals/contracts and contributing to BD pipelines and strategic captures.
- Direct RHBD experience mitigating SEU/SEE, plus proficiency in C++, Python, and TCL for advanced simulation and automation.
- Hands-on work with advanced FinFET and GAA nodes (e.g., Intel 18A) and a strong ability to rapidly learn new physics and technology platforms.
At JRC we offer...- A competitive compensation package
- An exceptional employee benefits program, providing support for our team members' well-being and success
- The chance to contribute to a high-profile Department of Defense programs and make a positive impact
- A collaborative work environment where teamwork, creativity, and innovation thrive
- Opportunities for professional growth and development, helping you advance your career
