Opportunity Overview Teradyne's Integrated Systems Test (IST) Hardware Engineering team is seeking a highly motivated, energetic, technically driven Senior FPGA Engineer to focus on the continuous development of our growing portfolio of hardware products and customers.
In your role as a FPGA Design Engineer for Teradyne, you will be an integral part of a world class team designing the best-in-class storage test and system level test equipment. You will be working with cross functional teams such as hardware, firmware, and software to define the FPGA functionality, create custom specifications, deliver the design, and perform the system integration test.
- Develop FPGA designs for new storage test and system test equipment
- Collaborate with cross-functional team members to write FPGA specifications meeting overall product requirements
- Drive FPGA design from initial architecture through implementation and verification
- Contribute to FPGA portion of hardware design (device selection, pinout, peripherals)
- Support firmware and software engineering during integration phase and board bring-up
- Hands-on debugging using lab equipment (logic analyzers, oscilloscopes, etc) and JTAG tools
All About You We seek individuals who share our passion and determination. Our commitment to customer success drives us to go the extra mile. If you're ready to join us in this mission, take a closer look at the minimum criteria for the position.
- 5+ years of working with FPGA design, implementation, and verification
- Experience writing Verilog for synthesis on FPGA devices
- Experience implementing FPGA designs using AMD (Xilinx) and/or Intel (Altera) tools, including configuring IP and creating timing constraints
- Proven design experience creating Verilog modules for some of the following technologies: SerDes, PCIe, ADCs and DACs, DDR memory, USB, AXI4, I2C, SPI, etc.
- Successfully build verification, test benches, and testing environments for new features
- Understanding of schematics and digital circuit design
- Experience performing FPGA feature validation on a hardware platform
- Ability to interact and communicate effectively with a variety of personnel and cultures
- Experience with System Verilog for verification and/or UVM environments
- Experience with FPGA SoC devices and their processor subsystems
- Basic scripting using TCL or Python
- Understanding of revision control systems
- Experience with control systems
Compensation: The base salary range for this role is $111,300-$178,200. This range is a good faith estimate, and the amount of base salary will correspond with experience and skill set. This range can also fluctuate depending on demand and location.
Incentive Plan: This job is eligible for discretionary bonus(es) based on financial performance.
Benefits: Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation & holidays, tuition assistance programs, and more. Please click here to see details.
