Akuna Capital

Senior FPGA Engineer

Akuna Capital$145K *
Information Technology
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • 10+ years of experience in FPGA or ASIC digital logic design, with network traffic experience as a strong plus
  • Deep skills in Verilog/SystemVerilog or VHDL
  • Strong understanding of static timing analysis, synthesis, and place-and-route tools
  • Familiarity with algorithms, data structures, and verification/unit testing workflows
  • Fluency in Python and Bash scripting
  • Collaborative spirit with enthusiasm for teamwork across FPGA, software, and trading teams
  • Open-minded approach towards novel development methods and architectures
  • Bachelor's degree in Computer or Electrical Engineering, or related field; master's degree preferred
  • Ability to react quickly and accurately to rapidly changing market conditions

Responsibilities

  • Own projects from inception to verification
  • Collaborate with Low Latency, Trading, and other teams to enhance performance
  • Develop and maintain RTL in Verilog/SystemVerilog
  • Write and sustain verification environments
  • Optimize designs for timing closure
  • Document project development processes
  • Drive innovative ideas and solutions within the team

Benefits

  • Comprehensive benefits package including employer-paid medical, dental, and vision
  • Retirement contributions
  • Paid time off
  • Discretionary performance bonus
  • Encouragement of unique perspectives and collaboration in problem-solving
Full Job Description
What you'll do as a Senior FPGA Engineer at Akuna:

We are looking for Senior FPGA Engineers to accelerate various portions of our trading platform. Members of the Hardware Development team will work with cutting-edge FPGA technology and high-performance computing architectures - owning projects end-to-end and making Akuna's systems faster and smarter. In this role, you will:
  • Own projects - driving project progression from inception, requirements, architecture, design entry, timing closure and verification
  • Partner closely with the Low Latency, Trading and other teams to foster and develop ideas that performance
  • Develop and maintain RTL in Verilog/SystemVerilog
  • Write and maintain verification environments
  • Design optimization for timing closure
  • Develop and maintain project documentation

Qualities that make great candidates:
  • 10+ years of experience in FPGA or ASIC digital logic design - network traffic experience a strong plus
  • Deep Verilog/SystemVerilog or VHDL skills
  • Solid grasp of static timing analysis, synthesis, and place-and-route tools
  • Familiarity with algorithms, data structures, and verification/unit testing workflows
  • Python and Bash scripting fluency
  • Enthusiasm for collaboration with other FPGA team members as well as members from software and trading teams
  • Open mindedness for novel development approaches and architectures
  • Bachelor's degree in Computer or Electrical Engineering, or related field; master's degree a plus
  • The ability to react quickly and accurately to rapidly changing market conditions, including the ability to quickly and accurately respond and/or solve math and coding problems are essential functions of the role

In addition to technical skillsets, Akuna values the unique perspectives people can bring to the table to collaboratively solve complex problems and drive Akuna forward. We want everyone to feel empowered to apply. We welcome your application and encourage you to take the first steps toward your future with us!

In accordance with Illinois Equal Pay Act, the minimum base salary starts at $145,000. Exact compensation offered may vary based on many factors including, but not limited to, the candidate's experience, qualifications, and skill set. This role is also eligible for a discretionary performance bonus as part of the total compensation package and includes a comprehensive benefits package that may encompass employer-paid medical, dental, vision, retirement contributions, paid time off, and other benefits. The minimum base salary herein was determined in good faith by Akuna Capital LLC.

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