Job Details:
Job Description:
We are seeking an exceptional Quantum Interposer Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for physical design and integration of advanced packaging interposers within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing.
Key Responsibilities
- Physical design and integration of interposers used within advanced packaging for quantum computing
- Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers
- Design validation and verification; including DRC and LVS
- Deliver and disseminate design milestones to stakeholders
- Communicate designs in presentations and relevant documentation
- Stay current with the latest developments in packaging technology and design techniques by attending conferences and reading papers
As a successful candidate, you must possess
- Excellent communication and presentation skills for technical and non-technical audiences
- Strong analytical thinking and problem-solving capabilities
- Collaborative mindset with ability to work effectively across diverse teams
- Adaptability to work in a fast-paced, innovative research environment
- Passion for pushing the boundaries of quantum technology development
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of relevant industry job experience, internship experience and/or schoolwork/classes/research.
Minimum Qualifications:
- M.S. degree in Electrical Engineering AND 5+ years of experience in physical design of silicon testchips, interposers, and/or related hardware.
- OR Ph.D. degree in Electrical Engineering with academic or work experience in the related areas.
The experience must include:
- Cadence Virtuoso
- Understanding of how signal and power integrity (SI/PI) impacts physical design.
- Understanding of advanced packaging technologies.
Preferred Qualifications:
- Strong understanding of superconducting metals.
- Proven experience with Synopsys and Ansys software packages for APR (automated place and route).
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.
