Microsoft

Principal Subsystem Engineer (Design or DV)

Microsoft • $142K — $274K *
Redmond, WA 98052In-Person
Consumer Technology
Less than 5 years of experience
Today
Be an Early Applicant
Job Overview by Ladders

Qualifications

  • Doctorate or equivalent in Electrical Engineering, Computer Engineering, Computer Science, or related field with relevant experience.
  • Minimum 3 years of technical engineering experience (3-9 years based on degree).
  • Demonstrated deep expertise in complex subsystems like PCIE, HBM, and more.
  • Experience with Verilog/System Verilog and microarchitecture specification.
  • Proficient in Design Verification (DV), including UVM-based testing techniques.
  • Ability to meet stringent security screening requirements.
  • Experience leading cross-functional engineering teams.

Responsibilities

  • Lead subsystem design or DV initiatives with technical expertise.
  • Collaborate with teams to enhance component reuse.
  • Mentor and guide team members to foster technical growth.
  • Debug and troubleshoot system-level issues throughout the design process.
  • Utilize thorough knowledge of various complex subsystems and data protocols.
  • Drive design quality through effective timing and synthesis strategies.
  • Create comprehensive verification strategies, including functional coverage and test plans.

Benefits

  • Extensive professional development opportunities.
  • Access to cutting-edge technology.
  • Potential for flexible work arrangements.
  • Engagement in impactful work that reshapes the tech landscape.
Full Job Description
Responsibilities

The AISoC silicon team is seeking a Principal Subsystem Engineer (Design or DV) to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom Intellectual Property (IP) and System on Chip (SoC) designs that can perform complex and high-performance functions in an extremely efficient manner. Team is currently looking for subsystem design and DV leads.

  • Technically lead one or more Subsystems as a design or DV engineer.
  • Collaborate across teams on vertical and horizontal reuse of components.
  • Provide technical leadership through mentorship and teamwork.
  • Work effectively with Architecture, Design, DV, PD, DFT, firmware, and post-silicon teams to debug system-level issues and deliver silicon from concept through bring-up.
  • Deep understanding of many of the following: complex subsystems (such as PCIE, HBM, imaging or control), fabrics, AMBA AXI/CHI protocols, DMA engines, NoCs, and high-throughput data buffering and movement.
  • Experience in design or DV domains.
  • Design includes but not limited to - Bandwidth, latency, utilization, and power tradeoffs while driving synthesis, timing constraints, floor-planning awareness, and performance tuning (Design). Verilog/System Verilog, microarchitecture specification development, RTL coding, integration, and design quality closure (CDC, lint, RDC) (Design).
    • OR
  • DV expertise includes but not limited to - Deep expertise in Design Verification (DV), including development of verification strategies and test plans, creation and debugging of UVM-based constrained-random testbenches, scoreboards, checkers, and assertions, implementation of functional coverage and coverage closure, and application of Agile methodologies for code reviews, sprint execution, and feature deployment.


Qualifications

Required Qualifications:

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.


Other Requirements:

  • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
  • This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.


Preferred Qualifications:

  • 9+ years of related technical engineering experience
    • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience
    • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
    • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
  • Experience debugging Register Transfer Level (RTL) designs as well as simulation and/or emulation environments.
  • Experience with design quality and static checks, DFT implementation and hand off to physical design.
  • Experience in design or DV domains.
  • 8+ years expertise in digital logic design including microarchitecture specification development, RTL coding in Verilog/System Verilog, design verification collaboration, and CDC/Lint closure.
  • 8+ years of experience in synthesis, timing constraints, power / performance / area (PPA) trade-offs and post-silicon debug
    • OR
  • 9+ years of experience in either design and integration or DV with a proven track record of delivering high-performance IP, SS or SOC testbenches.
  • Experience with verification for multiple product cycles from definition to Silicon, including writing test plans, developing tests, debugging failures and coverage signoff in C++ and Universal Verification Methodology (UVM).
  • 12+ years of relevant experience.
  • 5+ years experience with lead roles across cross-functional / cross-time-zone engineering teams.
  • Lead experience for an IP or SS related to CPUs, VPUs, GPUs, Direct Memory Access (DMA) engine, Tensor unit, or similar.
  • Experience of working on Artificial Intelligence (AI) / Machine Learning (ML) SoCs.
  • Experience in Scripting language such as Python or Perl.
  • Hands on experience in Formal property verification (DV)


#SCHIE

Silicon Engineering IC5 - The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:
https://careers.microsoft.com/us/en/us-corporate-pay

This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.

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Microsoft is an American multinational corporation that develops, manufactures, licenses, supports, and sells a range of software products and services. Microsoft’s devices and consumer (D&C) licensing segment licenses the Windows operating system and related software, Microsoft Office for consumers, and the Windows Phone operating system. The company’s computing and gaming hardware segment provides Xbox gaming and entertainment consoles and accessories, second-party and third-party video games, and Xbox Live subscriptions; surface devices and accessories; and Microsoft PC accessories. Its phone hardware segment offers Lumia smartphones and other non-Lumia phones. Its D&C segment provides Windows Store, Xbox Live transactions, and Windows phone store; search advertising; display advertising; Office 365 Home and Office 365 Personal; first-party video games; and other consumer products and services as well as operating retail stores. Microsoft’s commercial licensing segments license server products, including Windows Server, Microsoft SQL Server, Visual Studio, System Center, and related Client Access Licenses (CALs); Windows Embedded; Windows operating system; Microsoft Office for business, including Office, Exchange, SharePoint, Lync, and related CALs; Microsoft Dynamics business solutions; and Skype. Its commercial segment offers enterprise services, including premier support services and Microsoft consulting services; commercial cloud comprising Office 365 Commercial, other Microsoft Office online offerings, Dynamics CRM Online, and Microsoft Azure; and other commercial products and online services. The company markets and distributes its products through original equipment manufacturers, distributors, and resellers, as well as online.

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Learn more about Microsoft
Size
181,000 employees
Market Cap
$1,762.4 billion
Industry
Enterprise Technology
Net Income
$51.3 billion
Founded
1975
5 Year Trend
+15.5%
Revenue
$153.2 billion
NASDAQ
MSFT
* Ladders Estimates

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