Ampere Computing

Principal Power Analysis & Optimization Engineer

Ampere Computing$182K — $273K *
Consumer Technology
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • Bachelor's degree plus 8 years, Master's plus 6 years, or PhD plus 3 years in Electrical/Computer Engineering or related field
  • Strong knowledge of CMOS design and power optimization techniques
  • Proficient in power analysis using gate-level and RTL tools
  • Experienced in programming/scripting with Perl, Python, and Tcl
  • In-depth understanding of power-saving methods like clock-gating and DVFS

Responsibilities

  • Lead coordination of power management across diverse teams
  • Support architecture and micro-architecture teams to achieve SoC power targets
  • Establish and manage power optimization budgets for design blocks
  • Enhance methodologies for power modeling and analysis
  • Define benchmarks and tests for pre-silicon power analysis
  • Configure environments for power analysis at RTL and gate levels
  • Review power analysis reports, identifying areas for architectural improvement

Benefits

  • Comprehensive medical, dental, and vision insurance
  • Income protection and a 401K retirement plan
  • Unlimited Flextime and over 10 paid holidays for better work-life balance
  • Healthy snacks and drinks available to employees
Full Job Description
Description

About the role:

Ampere Computing is seeking a skilled Principal Power Analysis & Optimization Engineer to join our Silicon Engineering team. In this role, you will focus on power modeling, analysis, and optimization to help design high-performance, power-efficient CPUs and SoCs. You will collaborate across multiple teams to define power requirements and drive power optimization efforts from architecture and micro-architecture stages through to final silicon implementation.

The ideal candidate will have a strong background in SoC and CPU architecture, solid CMOS design fundamentals, and extensive knowledge of power reduction techniques across different levels of abstraction. You should be proficient in interpreting results from various power estimation tools and translating them into actionable strategies for power reduction. Additionally, experience in developing automated flows and scripting for data analysis and result consolidation is essential.

What you'll achieve:

  • Lead and coordinate power management efforts across multiple teams
  • Support Micro-Architecture and Architecture teams in meeting SoC power targets
  • Establish power optimization budgets for all design blocks and implement validation runs throughout the design cycle
  • Enhance existing power modeling and analysis methodologies
  • Define tests and benchmarks for pre-silicon power analysis across all blocks
  • Configure power analysis environments at both RTL and gate levels for comprehensive pre-silicon evaluation
  • Review and assess power analysis reports at RTL and gate levels, identifying opportunities for improvement at the architectural, RTL, and synthesis stages
  • Analyze power consumption based on workload activities executed in emulation environments
  • Develop a thorough understanding of various CPU use cases, as well as Memory and PCIe workloads
  • Utilize industry-standard power analysis tools such as Spyglass, Power Artist, Joules, and PrimePower

About you:

  • Proficient in power analysis utilizing gate-level and RTL power analysis tools
  • Strong knowledge of power analysis techniques and optimization strategies for CMOS designs
  • In-depth understanding of power-saving methods such as clock-gating, power-gating, and DVFS
  • Solid grasp of processor architecture and workload characteristics
  • Experienced in programming and scripting with Perl, Python, and Tcl
  • Skilled in conducting power analysis based on activity data from emulation environments
  • Educational background in Electrical or Computer Engineering with:
    • Bachelor's degree plus 8 years of relevant experience, or
    • Master's degree plus 6 years of relevant experience, or
    • PhD plus 3 years of relevant experience

What we'll offer:

At Ampere we believe in taking care of our employees and providing a competitive total rewards package that includes base pay, cash long-term incentive, and comprehensive benefits. The full base pay range for this role is between $182,000 and $273,000, except in the San Francisco Bay Area where the range is between $195,000 and $292,000.

Our benefits include health, wellness, and financial programs that support employees through every stage of life.

Benefit highlights include:

  • Premium medical insurance, dental insurance, vision insurance, as well as income protection and a 401K retirement plan, so that you can feel secure in your health and financial future.
  • Unlimited Flextime and 10+ paid holidays so that you can embrace a healthy work-life balance.
  • A variety of healthy snacks, energizing espresso, and refreshing drinks to keep you fueled and focused throughout the day.

And there is much more than compensation and benefits. At Ampere, we foster an inclusive culture that empowers our employees to do more and grow more. We are excited to share more about our career opportunities with you through the interview process.

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About Ampere Computing

Ampere Computing is a semiconductor company that designs and manufactures high-performance processors for cloud and edge computing. The company's processors are based on the Arm architecture and are optimized for power efficiency and performance. Ampere Computing was founded in 2017 by former Intel president Renee James and is headquartered in Santa Clara, California.
Learn more about Ampere Computing
Size
200 employees
Industry
Founded
2017

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