As a Principal Engineer at Micron's HBM New Product Validation team in Boise, ID you will be a senior technical guide responsible for validation strategy and readiness for future-generation High Bandwidth Memory (HBM) products. You will apply deep expertise in complex RAM and high-bandwidth memory architecture and building to establish architecture validation strategies. You will impact decisions that improve validation observability and debug efficiency. You will lead investigations of complex architecture, building, and silicon issues from pre-silicon simulation through post-silicon characterization. You will partner across Design Engineering, Design Validation, Product Engineering, Systems teams, and will develop and promote AI-enabled validation methodologies that improve efficiency, quality, and scalability. Responsibilities: - Define architecture-aware validation strategies and coverage direction for future-generation HBM products. - Drive validation readiness for next-generation products by preparing strategies, test environments, and execution plans before first silicon, reducing risk, accelerating issue resolution, and preventing late-stage surprises. - Evaluate new DRAM/HBM architectural features and define validation requirements and testability needs before DBR. - Develop validation strategies for new and high-risk product features and promote reuse of validation methodology across product generations. - Leverage expert knowledge of DRAM and HBM architectures, including memory subsystem design, test infrastructure, protocol validation, timing characterization, and failure mechanisms, to define validation methodologies, identify risks early, and ensure robust product readiness. - Challenge design assumptions using silicon data, simulation results, and structured risk analysis. - Use Verilog/SystemVerilog simulation to identify validation gaps early and evaluate coverage and observability pre-silicon. Minimum Qualifications: - Bachelor's or Master's degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field, with 8+ years of semiconductor proven experience. - Proven expertise in both pre-silicon and post-silicon debug of DRAM/HBM issues. - Extensive experience analyzing schematics and performing timing-accurate (SPICE-level / transistor-level) simulations. - Experience with Verilog/SystemVerilog, Python, Linux environments, and version control systems (git, svn, Perforce). - Excellent problem-solving, analytical, communication, and technical presentation skills, with a track record of technical influence. Preferred Qualifications: - Experience defining validation strategy or coverage methodology for HBM or advanced DRAM products. - Experience influencing design-for-validation or testability decisions with Design Engineering or Design Validation teams. - Experience with validation hardware pathfinding, including probe cards, sockets, and interface boards. - Hands-on experience with lab equipment including oscilloscopes and logic analyzers, and with high-speed I/O and signal-integrity validation. - Experience defining or applying AI/ML or generative-AI solutions to validation, test, or debug workflows. As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.