Ciena

Mixed Signal Design Engineer

Ciena$90K — $144K *
Technical Services
Less than 5 years of experience
Job Overview by Ladders

Qualifications

  • Degree in Electrical/Computer Engineering, Computer Science, or similar field (BEng/BSc, MEng/MSc, or PhD)
  • Design experience with CMOS and BiCMOS technology
  • Proficiency in Cadence Virtuoso/Xcelium/AMS, Synopsys VCS/StarRC, Siemens Questa/Formal/Calibre/SymphonyAMS/AFS
  • Familiarity with programming languages: SystemVerilog, VerilogAMS, VerilogA, Matlab/Simulink, C/C++, Python
  • Ability to work both independently and in a team setting
  • Strong writing and presentation skills in English

Responsibilities

  • Design high precision Sigma-Delta DAC and ADC for control and monitoring
  • Create SystemVerilog models for various analog macros
  • Develop IBIS-AMS models for high-speed DAC and ADC based SerDes IP
  • Document design specifications
  • Collaborate with system, analog, digital, DSP, signal integrity, hardware, firmware teams, and analog lab

Benefits

  • Comprehensive medical, dental, and vision plans
  • 401(K) (USA) & DCPP (Canada) with company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Paid holidays, sick leave, and vacation time
  • Paid Family Leave and other applicable leaves of absence
Full Job Description
How You Will Contribute:

The Wavelogic family of products is widely used in Ciena's optical fiber transmission solutions and is one of the main contributors to Ciena's success in the telecommunications industry. Successful candidates will be joining a vibrant team with a proven track record of success over 30 years of evolution and revolution in the advancement of high-speed circuits used in broadband fiber-optic modems. This team pioneered the introduction of the world's first high-speed DAC and ADC analog macros that ushered in the era of coherent fiber-optic product solutions. Reporting to the Senior Manager of Analog Engineering, your role will be:
  • Designing the high precision Sigma-Delta DAC and ADC for control and monitoring
  • Designing the SystemVerilog models for various analog macros
  • Designing the IBIS-AMS models for the high-speed DAC and ADC based SerDes IP running at 56Gbd, 112Gbd, 224Gbd, and 448Gbd
  • Creating Design Specification Document
  • Interacting with and providing support to the system team, analog team, the digital team, the DSP team, the signal integrity team, the hardware team, firmware team, and the analog lab bring-up team.


The Must Haves:
  • Electrical or computer engineering, computer science or other applicable scientific degree at the BEng/BSc, MEng/MSc, or PhD level
  • Design experience in the latest CMOS and BiCMOS technology
  • Proficiency with Cadence Virtuoso/Xcelium/AMS, Synopsys VCS/StarRC, Siemens Questa/Formal/Calibre/SymphonyAMS/AFS
  • Familiarity with SystemVerilog, VerilogAMS, VerilogA, Matlab/Simulink, C/C++, Python languages
  • Ability to work independently and collaboratively with team members
  • Skills of writing and presenting in English


Assets:
  • Knowledge of UVM, Git, Gradle, Google Tests
  • Experience with the RF and Signal Integrity tools
  • DSP, digital, and analog design and modelling in high SerDes application
  • AI tools for automation

Pay Range: The annual salary range for this position is $90,600 - $144,800 CAD.

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

About Ciena

Ciena Corporation is a global supplier of telecommunications networking equipment, software, and services. The company was founded in 1992 and is headquartered in Hanover, Maryland. Ciena's products include optical transport and switching systems, software, and services that support the transport, switching, aggregation, and management of voice, video, and data traffic. Ciena serves customers in the telecommunications industry, including telecommunications service providers, cable operators, governments, and enterprises. The company has approximately 7,000 employees worldwide and operates in more than 100 countries.
Learn more about Ciena
Size
7,241 employees
Market Cap
$7.3 billion
Industry
Net Income
$354.3 million
Founded
1992
5 Year Trend
+5.3%
Revenue
$3.4 billion
NASDAQ

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