Microarchitect and RTL Design Engineer

Baya Systems

• $150K — $180K *
Telecommunications & Hardware
8 - 10 years of experience
Job Overview by Ladders

Qualifications

  • BS or MS in Electrical Engineering, Computer Engineering, or Computer Science
  • 8+ years of hands-on experience in microarchitecture and RTL development
  • Proficient in Verilog and System Verilog
  • Familiar with industry-standard EDA tools and methodologies
  • In-depth knowledge of on-chip interconnects and NoC's
  • Experience designing IP blocks for caches and memory subsystems
  • Effective problem-solving and communication skills

Responsibilities

  • Design and develop microarchitectures for configurable IPs
  • Implement microarchitecture and RTL coding for performance and power optimization
  • Collaborate with software teams on configuration requirements and verification
  • Assist verification teams with assertions, test plans, and debugging

Benefits

  • Comprehensive medical, dental, and vision coverage
  • 401(k) retirement plan
  • Equity options
  • Performance-based incentives
Full Job Description
MICROARCHITECT AND RTL DESIGN ENGINEER

SANTA CLARA, CA

About the role:

We are seeking a seasoned Microarchitect and RTL Design Engineer with a strong background in microarchitecture and RTL coding. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions

Responsibilities:
  • Design and develop microarchitectures for a set of highly configurable IPs
  • Microarchitecture and RTL coding ensuring optimal performance, power, area
  • Collaborate with software teams to define configuration requirements, verification collaterals, etc.
  • Work with verification teams on assertions, test plans, debug, coverage, etc.


Qualifications and Preferred Skills:
  • BS, MS in Electrical Engineering, Computer Engineering or Computer Science
  • 8+ years and current hands-on experience in microarchitecture and RTL development
  • Proficiency in Verilog, System Verilog
  • Familiarity with industry-standard EDA tools and methodologies
  • Experience with large high-speed, pipelined, stateful designs, and low power designs
  • In-depth understanding of on-chip interconnects and NoC's
  • Experience within Arm ACE/CHI or similar coherency protocols
  • Experience designing IP blocks for caches, cache coherency, memory subsystems, interconnects and NoC's
  • Familiarity with RAS designs, QoS in fabrics, PCIe/IO is a plus
  • Experience with modern programming languages like Python is a plus
  • Excellent problem-solving skills and attention to detail
  • Strong communication and collaboration skills


Compensation:
  • Salary commensurate with experience
  • Performance incentives
  • Comprehensive medical, dental, and vision benefits
  • 401(k) retirement plan
  • Equity

Similar Jobs

More Jobs at Baya Systems

More Telecommunications & Hardware Jobs

Find similar Microarchitect and RTL Design Engineer jobs: