Member of Technical Staff, ASIC Architecture

Netpreme

$130K — $180K *
Consumer Technology
5 - 7 years of experience
Job Overview by Ladders

Qualifications

  • BS/MS or PhD in Electrical Engineering or Computer Science with 5+ years of relevant experience
  • Strong background in computer architecture focused on memory systems
  • Understanding of scale-up memory fabric and protocols
  • Familiarity with GPU memory organization
  • Experience with performance modeling for ASICs

Responsibilities

  • Model performance for GPU memory subsystems and interconnects
  • Design data and control planes for efficient data movement
  • Create and simulate I/O-heavy SoC architectures
  • Develop architecture specs from concept to production
  • Collaborate with silicon and software teams for alignment of specs

Benefits

  • Comprehensive health, dental, vision, and life insurance
  • Relocation assistance and visa sponsorship
  • Daily lunch stipend and 401k match
  • Collaborative and continuous-learning work environment
  • Well-equipped offices in Santa Clara, CA and Boston, MA
Full Job Description
About the Role

We are seeking an ASIC Architect to help define the architecture and microarchitecture of our silicon product. This role is onsite at our Santa Clara, CA or Boston, MA office.

Responsibilities
  • Performance modeling for GPU memory subsystems and memory-semantics interconnects
  • Architecting data and control planes for high-speed data movement
  • Designing and simulating I/O-heavy SoC architectures
  • Own SoC and system architecture specs from inception through high-volume production
  • Partner with silicon and software teams to ensure implementation aligns with architecture specs

Qualifications
  • BS/MS or PhD in Electrical Engineering or Computer Science with 5+ years of relevant experience
  • Strong background in computer architecture with a focus on memory systems and memory-semantics interconnects
  • Strong understanding of scale-up memory fabric and protocols
  • Familiarity with GPU memory organization
  • Experience running detailed performance modeling for computing and/or data movement ASICs
  • Familiarity with state-of-the-art distributed ML algorithms

Preferred Qualifications
  • Experience architecting endpoints for memory-semantics interconnects: CXL, NVLink, UALink, RDMA
  • Experience building AI accelerators
  • Background in cloud virtualization and hardware security
  • Knowledge of ARM CHI / UCIe

Compensation & Benefits
  • Competitive salary commensurate with experience including base salary, performance-based bonus, and early stage equity grant
  • Comprehensive benefits including health, dental, vision, and life insurance
  • Well-equipped, sunny offices in Santa Clara, CA and Boston, MA
  • Relocation assistance and visa sponsorship
  • Perks include a daily lunch stipend, 401k match, and more
  • A collaborative, continuous-learning work environment with smart, dedicated colleagues engaged in developing the next generation of architecture for high-performance computing

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