RELOCATION ASSISTANCE: Relocation assistance may be available
CLEARANCE REQUIRED FOR START: No
CLEARANCE TYPE: None
TRAVEL: Yes, 10% of the Time
DescriptionNorthrop Grumman Space Systems is seeking a
FPGA Digital Engineer – Manager 2, to join their team in
Linthicum, MD.
The candidate will manage a Digital Technology design group within the Electronics and Payload Hardware Engineering organization. Emphasis is placed on leading a team of 10 – 15 FPGA designers and digital design architects that support development and production programs, and new business pursuits to ensure quality engineering solutions. Our engineering work includes full life-cycle programs including system design, development, system integration, hands on test, training, and production.
This position will report to the department manager of Digital Technologies department within Electronics and Payload. Minimal travel is expected.
Roles and responsibilities may include, but are not limited to:
- Technical or IPT Leadership on a piece of a larger program
- General team supervision, performance management, career development, staffing, merit planning, engagement, employee rewards and recognition, and resolving personnel issues
- Provide project and technical oversight for design activities performed by the group
- Strategic hiring and employee skills development, labor forecasting and execution through close collaboration with program management, and balancing employee needs with business goals
- Manpower and resource assignment
- Technical risk assessment and mitigation
- Facilitate knowledge sharing and mentoring
- Analysis of design tools, processes, and technologies needed to support strategic product plans
- Maintain and ensure application of design processes and guidelines used by the department
- Develop proposal inputs and review proposal content for both internal and external customers
- Lead or support department initiatives, recruiting, technology roadmap creation, cross-campus/sector involvement, and ITA/NCTA project leadership
Basic Qualifications:
- Bachelor of Science Degree in a Science, Technology, Engineering, or Math (STEM) discipline plus 8 years of engineering experienceORMaster of Science Degree in a STEM discipline plus 6 years of engineering experience OR PhD in a STEM discipline with 4 years of engineering experience
- Excellent verbal, organizational, and written communication skills are required
- Experience with FPGA design
- Technical or IPT Team Lead experience
- Must have the ability to obtain and maintain a Top Secret/SCI security clearance with polygraph
Preferred Qualifications:
- 6 years of digital hardware or FPGA design engineering experience
- Experience with DSP Design 6 FIR Filters, Detection algorithms and channelization
- Demonstrated technical leadership of digital design teams
- Ability to collaborate with multi-disciplinary teams
- Able to work in a fast-paced environment where multiple projects are being developed and deployed simultaneously
- Experience with program management, functional management, and/or customer management
- Active TS/SCI clearance with polygraph
Primary Level Salary Range: $153,800.00 - $230,800.00
The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions.
Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.
