As a Machine Learning IP Validation Engineer at Meta Reality Labs, you will use your hardware/software integration, prototyping, emulation, firmware, and hardware validation skills to develop IP validation infrastructure; bring up, validate, and optimize ML workloads across pre-silicon and post-silicon platforms; and improve the functionality, performance, power, and robustness of state-of-the-art ML accelerators. You will partner cross-functionally with RTL design, verification, emulation, architecture, ML compiler, firmware/runtime, and ML model teams to define validation requirements, debug cross-layer issues, and drive them to resolution.
Responsibilities
Define and execute HW-SW integration, functional validation, and characterization plans for ML accelerator IP across emulation, prototyping, and silicon platforms
• Identify risks and develop mitigation strategies
• For new technologies and features, work closely with design engineering on defining performance-power characterization and validation strategy, as well as detailed test plans
• Participate in design reviews and make recommendations to support overall test strategy
• Create test setups, collect and analyze data to help debug technical issues
• Partner with RTL design, design verification, emulation, SoC architecture, ML compiler, firmware/runtime, and system teams to bring up ML workloads, identify root causes, drive cross-layer issues to resolution, and verify fixes
• Convert large amounts of data into a clear summary to communicate to stakeholders at all levels
Minimum Qualifications
• Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
• 8+ years of relevant experience in consumer electronics or related fields
• Experience creating validation plans for hardware products including developing test methodologies for new features and technologies
• Experience with HW-SW integration and validation of ML accelerators or related programmable compute IP, including workload bring-up, functional debug, performance characterization
• Familiar with testing common SOC HW interfaces such as AXI, APB, AHB, OCP
• Experience in troubleshooting with component vendors on test escapes, missing test coverage, etc
Preferred Qualifications
• Demonstrated experience supporting technical teams, cross-functional groups and vendors to execute against validation plans
• Demonstrated understanding of consumer electronics product lifecycle, development process and partner eco-system
• Experience working as a verification or systems engineer
• Experience working with embedded systems that run on RTOS/Android/Linux
• Scripting experience for test automation and data processing/organization
• Experience with ML frameworks, compilers, runtimes, or model-deployment workflows, including profiling or optimizing ML workload performance, data movement, memory behavior, or power
• Proven communication and collaboration skills and experience communicating and driving issues to resolution across cross functional teams
• Experience working with overseas development and manufacturing partners
• Demonstrated ability to integrate AI tools to optimize/redesign workflows and drive measurable impact (e.g., efficiency gains, quality improvements)
• Experience adhering to and implementing responsible, ethical AI practices (e.g., risk assessment, bias mitigation, quality and accuracy reviews)
• Demonstrated ongoing AI skill development (e.g., prompt/context engineering, agent orchestration) and staying current with emerging AI technologies
