Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:The Qualcomm GSoC HW team develops and delivers innovative, best-in-class products across advanced compute and connectivity domains. As part of the Global SoC organization, our ASIC Design Verification Engineers bring deep expertise in CPUs, memory systems, High Bandwidth Compute (HBC), AI inference acceleration, and ASIC design and verification fundamentals, along with a strong drive to create new solutions. This role offers a unique opportunity to make a meaningful impact on next-generation product lines, from data center solutions to AI/ML and autonomous driving technologies. You will join an exceptional global engineering team dedicated to pushing the boundaries of what is possible today and defining the platforms of the future.
Job OverviewWe are looking for highly motivated new college graduates and experienced Design Verification Engineers to join our GSoC Design Verification team. In this role, you will verify next-generation Data Center SoCs that power AI, high-performance computing, mobile, and cloud infrastructure products. You will partner closely with architects, design engineers, software teams, and verification specialists to build scalable verification solutions, drive verification closure, and support first-silicon success for complex SoC designs.
This role provides the opportunity to work on advanced technologies such as multi-core CPUs, cache coherency systems, memory subsystems, AI/ML accelerators, high-speed interconnects, security, and modern SoC architecture.
As an SOC Verification Engineer, you will be responsible for ensuring the quality and functionality of System-on-Chip (SOC) designs through comprehensive verification processes. You will develop and implement verification methodologies, create test plans, and execute verification tests to identify and resolve design issues. Additionally in this role, you will also help build the AI-powered intelligent agents that assist engineers in areas such as Design Verification, regression management, debug automation, test planning, and design analysis.
Key Responsibilities: - Develop and execute comprehensive verification plans for SoC, subsystem, and IP-level features.
- Design and implement scalable System Verilog/UVM-based and Processor-based verification environments.
- Create directed and constrained-random test scenarios to validate functionality and architectural use cases.
- Develop assertions, functional coverage models, and checkers.
- Debug RTL, testbench, and integration issues and work closely with design teams to resolve defects.
- Drive coverage closure using functional and code coverage metrics.
- Participate in architecture and design reviews to ensure verification requirements are incorporated early in the development cycle.
- Verify complex Data Center SoC features.
- Support emulation and acceleration-based verification when required.
- Contribute to methodology improvements, automation, reusable verification components, and AI-assisted verification flows.
- Develop AI agents that automate engineering tasks across domains workflows.
- Build agent workflows using modern LLM frameworks and agent orchestration platforms.
- Create integrations between AI systems and engineering tools, databases, and knowledge repositories.
- Develop Retrieval Augmented Generation (RAG) pipelines for system documentation, specifications, and engineering knowledge.
Qualifications - Bachelor's or master's degree in electrical engineering, Computer Engineering, Computer Science, or related field.
- Strong knowledge of: System Verilog, UVM, C, Assertion-Based Verification (SVA), Coverage-Driven Verification, System level Use case verification
- Experience developing verification environments from architecture/specification through signoff.
- Strong understanding of computer architecture and digital design fundamentals.
- Experience debugging complex SoC-level issues.
- Strong problem-solving and analytical skills.
- Proficiency in Python or scripting languages for automation.
- AI-assisted verification of workflows and test generation.
- Excellent communication and collaboration skills.
Preferred Qualifications - Experience in full-chip or subsystem verification environments.
- Experience with one or more of the following:
- Cache coherency protocols (ACE, CHI, CXL)
- DDR or HBM memory systems
- PCIe, Ethernet, or networking protocols
- AI/ML accelerator design verification
- Security and RAS feature verification
- System Power and Performance verification
- Experience with: Portable Stimulus (PSS), Formal Verification, Emulation platforms (Veloce/Palladium/ZeBu), Power-aware verification
- Understanding of machine learning and Generative AI concepts.
- Knowledge of LLMs such as GPT, Claude, Llama, or equivalent models.
- Collaborate with RTL, DV, CAD, and AI platform teams to identify automation opportunities.
- Measure and track productivity improvements delivered through AI-enabled workflows.
- Contribute to internal AI platforms, reusable skills, tools, and agent libraries.
Minimum Qualifications:• Bachelor's degree in Science, Engineering, or related field.
Pay range and Other Compensation & Benefits: $98,500.00 - $147,700.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
