FPGA/DSP Engineer, Wideband Signal Processing - Build the Real-Time Core of Advanced RF SystemsTampa, FL | On-site
Opportunity SummaryJoin an early-stage defense technology company developing advanced RF sensing and electronic systems for demanding operational environments. The team builds its own hardware, firmware, and signal-processing architecture from the ground up, with systems already being evaluated and deployed by government and defense customers.
You will own the real-time signal-processing core of a wideband sensing platform. The system must process large amounts of spectrum at once, detect many simultaneous emitters in congested environments, and timestamp activity precisely enough to support geolocation. Rather than handing protocol processing to a separate processor, the team performs much of this work directly in FPGA fabric, including cellular, Wi-Fi, Bluetooth, and GNSS processing down to the frame and subframe level.
Job Duties- Own FPGA-based signal processing from digitized RF samples through detection outputs
- Develop wideband DSP pipelines capable of processing large instantaneous bandwidths in real time
- Implement digital downconversion, filtering, polyphase channelization, FFT processing, energy detection, adaptive thresholds, CFAR techniques, and burst detection
- Build protocol-aware detection and timestamping for cellular, Wi-Fi, Bluetooth, GNSS, and other wireless signals
- Extend existing in-house processing that operates on protocol frames and subframes directly in FPGA fabric
- Implement processing for 2G, 3G, LTE, and 5G signal environments where applicable
- Develop precise hardware timestamping tied to disciplined timing references for distributed sensing and time-difference-of-arrival techniques
- Build coherent multichannel processing that preserves phase information for angle-of-arrival and other localization methods
- Partner with RF and geolocation engineers to maintain synchronization and signal integrity across multiple channels
- Design high-throughput data paths using JESD204B/C, AXI, DMA, Ethernet, PCIe, or comparable interfaces
- Support high-rate transfer of IQ data, detections, timestamps, and metadata to downstream processing systems
- Partition workloads across FPGA fabric, embedded ARM processors, and edge compute hardware based on latency, bandwidth, and processing requirements
- Drive timing closure on dense, high-utilization FPGA designs
- Own simulation, verification, hardware-in-the-loop testing, and regression coverage
- Develop and maintain bit-accurate reference models using Python, MATLAB, or similar tools
- Debug designs directly on hardware using scopes, logic analyzers, spectrum analyzers, and other RF test equipment
- Reuse and adapt internal FPGA IP where it improves schedule without compromising performance or maintainability
- Help establish reusable FPGA architecture, coding standards, and verification practices as the engineering team grows
Qualifications- BS in Electrical Engineering, Computer Engineering, or a related technical discipline, or equivalent practical experience
- 5+ years of FPGA development experience focused on DSP, SDR, communications, radar, or similar real-time systems
- Strong VHDL, Verilog, and/or SystemVerilog experience
- Hands-on experience with AMD/Xilinx development environments including Vivado
- Demonstrated ability to close timing on complex, high-utilization FPGA designs
- Experience shipping streaming DSP implementations such as DDCs, filters, FFTs, channelizers, detectors, or similar signal-processing blocks
- Experience with Zynq UltraScale+, RFSoC, MPSoC, or comparable heterogeneous FPGA platforms
- Strong understanding of AXI-based architectures, DMA, memory interfaces, and high-throughput data movement
- Experience with JESD204B/C or similar high-speed converter interfaces
- Experience moving high-rate data off-platform using Ethernet, PCIe, or comparable interfaces
- Strong verification practices using testbenches, cocotb, UVM, MATLAB, Python, or similar tools
- Ability to build bit-accurate or bit-true reference models for DSP verification
- Comfortable debugging hardware in the lab with RF and digital test equipment
- Strong understanding of fixed-point arithmetic, latency, throughput, resource utilization, and timing tradeoffs
Preferred Experience- Experience with LTE, 5G, or other cellular PHY or protocol processing based on 3GPP standards
- Familiarity with 2G or 3G cellular protocols
- Experience with Wi-Fi or Bluetooth baseband processing
- Background in SIGINT, electronic warfare, spectrum monitoring, wireless sensing, or radar signal processing
- Experience processing communications protocols directly in FPGA fabric
- Experience with coherent receiver architectures, array processing, beamforming, or angle-of-arrival techniques
- Familiarity with distributed sensing and TDOA-based geolocation
- Experience maintaining phase coherence across multiple RF channels
- Vitis HLS, System Generator, HDL Coder, or other model-based FPGA development experience
- Experience integrating FPGA processing with ARM processors, GPUs, or other heterogeneous compute platforms
- Experience developing custom firmware and control logic rather than primarily integrating third-party IP
Compensation Details$120,000 - $150,000
