Job Description

You will be the FPGA Design Engineer for the Missile & Fire Control (MFC) team at Lockheed Martin. Our team delivers advanced FPGA solutions that enable current and next generation defense systems, providing the high performance computing and signal processing capabilities required for mission critical platforms.

What You Will Be Doing
As the FPGA Design Engineer you will develop FPGA architectures from specification through implementation, conduct trade studies to optimize device utilization, power and thermal performance, and work closely with software, hardware and systems engineers to define requirements and ensure compliance with the Design Assurance process. Your responsibilities will include:
• Translating system specifications into detailed FPGA designs, creating RTL, constraints and HDL code (VHDL/Verilog).
• Performing synthesis, place and route, timing analysis and power budget assessments to meet performance, power and thermal budgets.
• Conducting trade studies to evaluate device families, resource utilization, cost and risk, and recommending optimal solutions.
• Collaborating with software, hardware and systems engineers to define architecture, interface requirements and verification plans.
• Developing and executing test plans, hardware in the loop verification and validation activities.
• Managing configuration control and versioning in LM approved repositories (e.g., GitLab) and maintaining design documentation.
• Supporting Design Assurance reviews (PDR, CDR, TRR) and ensuring compliance with MFC engineering standards.
• Providing technical guidance and mentorship to junior engineers and fostering knowledge sharing within the team.
• Participating in cross functional technical meetings, risk assessments and schedule reviews.

Further Information About This Opportunity:
This position is in Orlando. Discover more about our Orlando, Florida location.

MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance. A Secret clearance with Investigation or CV date within 5 years is required to start.

Basic Qualifications

Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education

HDL programming experience with VHDL, Verilog, and/or System Verilog

Experience with AMD/Xilinx Versal FPGAs and related toolsets such as Vivado

Experience with FPGA simulation tools and languages such as Synopsys VCS and SystemVerilog

Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity

Experience high speed data and memory interface implementation

Desired skills

Experience with common EOIR imaging processing techniques

Proficiency with version control systems, such as Git

Knowledge of software programming languages, such as C, C++, or Python

Experience with debugging and troubleshooting complex digital systems

Knowledge of UVM and experience with UVM-based verification methodologies

Experience with missile interfaces and processor interfaces

Ability to conduct FPGA trade-off studies focusing on device utilization, power, and thermal optimization

Proven ability to collaborate effectively with cross-functional software, hardware, and systems engineering teams

Familiarity with LM MFC Design Assurance and Design Architecture development processes

Work Schedule Information

Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits.

National Pay Statement

Pay Rate: The annual base salary range for this position in California, Massachusetts, and New York (excluding most major metropolitan areas), Colorado, Hawaii, Illinois, Maryland, Minnesota, New Jersey, Vermont, Washington or Washington DC is $123,500 - $217,695. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
(Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.
This position is incentive plan eligible.

Premium Pay Statement

Pay Rate: The annual base salary range for this position in most major metropolitan areas in California, Massachusetts, and New York is $142,000 - $246,100. For states not referenced above, the salary range for this position will reflect the candidate's final work location. Please note that the salary information is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market and business considerations when extending an offer.
Benefits offered: Medical, Dental, Vision, Life Insurance, Short-Term Disability, Long-Term Disability, 401(k) match, Flexible Spending Accounts, EAP, Education Assistance, Parental Leave, Paid time off, and Holidays.
This position is incentive plan eligible.