Job Description

Job Title: Engineer Digital 3
Location: Woodland Hills, CA
Zip Code: 91367
Duration: 12 Months
Pay Rate: Up to $94.05/hr.
Schedule: 9/80 A
Start Date: Immediate
Keyword's: #WoodlandHillsjobs; #digitialengineerjobs.
*You must have an active DoD Secret Clearance*

JOB DESCRIPTION:
Our customer is looking for you to join their team as a Principal Digital Engineer based out of Woodland Hills, CA. As a Principal Digital Engineer with our customer, you will have a challenging and rewarding opportunity to be a part of their Enterprise-wide digital transformation. Through the use of Model-based Engineering, DevSecOps and Agile practices they continue to evolve how they deliver critical national defense products and capabilities for the warfighter. Our client's success is grounded in their ability to embrace change, move quickly and continuously drive innovation. The successful candidate will be collaborative, open, transparent, and team-oriented with a focus on team empowerment & shared responsibility, flexibility, continuous learning, and a culture of automation.

What You"ll get to Do:
The Digital Engineer will be responsible for design and verification of digital systems on a safety-critical development program. Candidate is required to have extensive knowledge of digital design and verification concepts. Candidate will possess strong communication skills as he or she will interface with our development program leads, senior scientists, engineering and manufacturing organizations throughout the program lifecycle. The individual will also have technical foresight to integrate the appropriate requirements, processes, procedures and tools as this development program will lead to the future generation of navigation, video & cockpit products.

Basic Qualifications:
*Bachelor's degree in a STEM field with 5 years of relevant experience; master's degree in a STEM field with 3 years of relevant experience; PhD in a STEM field with 1 year of relevant experience.
*Experience with High-Speed Digital Design and Verification.
*Experience with FPGA/SOC/ASIC implementation. (VHDL/Verilog, Synthesis, Timing Closure)
*Experience with design processes including hardware requirements definition, conceptual design, detailed design, verification, production transitioning.
*U.S. Citizenship is required.
*A current/active U.S. Government Secret Clearance is required.
*Ability to work onsite full-time in Woodland Hills, CA.

Preferred Qualifications:
*Experience with V&V technologies. (System Verilog, UVM, Hardware-In-Loop)
*Knowledge of Computer Architecture. (Bus standards, Interrupts, Memory)
*Experience with Model-based Engineering. (MATLAB, Simulink, Fixed Point vs. Floating Point)
*Experience with Sensors and Digital Signal Processing.
*Cost Account Management (CAM) certification / experience.
*Experience with safety critical designs. (DO-254)
*Communication, team building and facilitation skills.

Minimum Security Clearance

SECRET REQUIRED