Job DescriptionBAE Systems is seeking FPGA Technical Managers!
Do you have the technical knowledge and leadership experience needed to manage a team of FPGA Designers and Design Verification engineers solving complex problems? Do you have the business acumen to understand the big picture, collaborate and communicate effectively, and meet program commitments? The FPGA Technical Manager provides that focus to meet both technical deliverables and program commitments. Your experience and leadership in technical development will challenge your team's approaches on architecture, design scope, quality, and implementation while maintaining adherence to engineering best practices. Your business acumen will enable the team to collaborate across disciplines, focus on deliverables, maintain schedule commitments, manage scope, and contain cost growth; all concurrent with being an agent for change continuously improving efficiency and the quality of deliverables.
This position will be posted for at least 5 calendar days. The posting will remain active until the position is filled, or a qualified pool of candidates is identified.
Required Skills and Education- 10+ years of relevant experience with bachelor's degree in EE/ECE
- Current Security Clearance (Secret or higher), or eligible to obtain one
- Experience leading and managing engineering design teams with a proven track record of delivering complex FPGA-centric designs
- Proficient in planning and managing schedule, staffing, cost, and risks
- Ability to quickly identify, respond-to, and mitigate events that could impact schedule, cost, or performance
- Flexibility to work in a dynamic environment with changing needs, requirements, and technical challenges
- Ability to provide mentorship to less experienced team members
- Strong written and oral communication skills
- Deep understanding of FPGA architecture and design tradeoffs
- Experienced in all stages of FPGA and/or ASIC development including requirements management, RTL design, verification, synthesis, timing analysis, lab bring up/validation
- Experience working within a team of FPGA Design and Design Verification engineers
- Proficient in VHDL (preferred) or Verilog HDL coding
- Familiarity with AMD Vivado/Vitis or Altera Quartus
- Proficient in MS-Project, MS-Word, MS-Excel
Preferred Skills and Education- Masters degree in EE/ECE or technical MBA with 10+ years of experience
- Experience with Matlab and DSP fundamentals
- Software development skills (C/C++)
- Scripting skills (Perl, Python, bash, Tcl)
- Exposure to Design Verification methodologies such as UVM/OVM
- Experience with Earned Value Management
- Experience with DoD projects
