Position Summary
In your role as a Device Integration Engineer, you'll be responsible for optimizing transistor performance and targeting to maximize product yield, reliability, and manufacturability on new and developing 14nm Derivative generation.
You'll use your device physics interaction understanding across all modules – Fin/PC, SD, RMG/MOL, BEOL – in order to work closely with other Integration and Fab Engineering Teams on existing and next generation technologies.
Role and Responsibilities
Here's what you'll be responsible for:
Ensuring targeting of transistor focused Electrical Test (ET) trends to Customer/Product Specifications and performing timely root cause study to shifts or abnormality.
Analyzing process interactions (inline metrology, FDC, etc.) to ET while also understanding ET data effect on Parametric Yield.
Owning Parametric Yield and Wafer Acceptance Electrical Test (WAT) management for one or more Customer Accounts/Products.
Executing, and analyzing experiments to optimize Transistor performance/variation with end goal of improving Parametric Yield and ensuring a reliable and manufacturable product.
Drive Task Force Teams to solve systematic yield, performance, or reliability issues.
Supporting unit process (ex: CMP, Etch, etc) or the process integration team with evaluation of device impact for key change points (ex: cost/step reduction, throughput improvement, etc.).
Generating written reports and oral presentations for internal management, external teams, and sometimes company executives.
Skills and Qualifications
Here's what you'll need:
- Bachelors of Science or Engineering (Electrical, Computer, Chemical, Material Science, or related areas) required. Masters or PhD is a plus.
- 3+ years of semiconductor industry experience is preferred
- Prior experience and understanding of the interactions between process and Electrical test. Knowledge of process flow
- Familiarity with unit processes including thin films deposition, etch, diffusion, wet process, CMP, Photolithography, etc.
- SPICE modeling/simulation and MHC experience preferred but not required.
All positions at Samsung Austin Semiconductor require you to be onsite.
The current base salary range for this role is between $83,000 - $206,000. Individual base pay rates will depend on factors including duties, work location, education, skills, qualifications and experience. Total compensation for this position will include a competitive benefits package and may include participation in company incentive compensation programs, which are based on factors to include organizational and individual performance.
Total Rewards
At Samsung SAS, base pay is just one part of our total compensation package. The base compensation for this role will depend on education, experience, skills, and location.
We offer a comprehensive benefits package, including:
- Medical, dental, and vision insurance
- Life insurance and 401(k) matching with immediate vesting
- Onsite café(s) and workout facilities
- Paid maternity and paternity leave
- Paid time off (PTO) + 2 personal holidays and 10 regular holidays
- Wellness incentives and MORE
Eligible full-time employees (salaried or hourly) may also receive MBO bonuses based on company, division, and individual performance.
All positions at SAS are full-time on-site.
U.S. Export Control Compliance
This role requires access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.
Trade Secrets Notice
By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.
