General Summary:Qualcomm's System Validation & Emulation (SVE) team is part of the central SoC validation organization responsible for ensuring
end-to-end silicon quality across pre- and post-silicon phases.
This team focuses on
content quality and system-level validation enablement, offering deep exposure to Qualcomm SoCs through
bare-metal validation content, scalable automation frameworks, and complex system debugs. Engineers in this role work across HW and SW boundaries to
develop, validate, and scale system-level test content, ensuring high-quality silicon validation across a wide range of SoC domains.
Excellent Opportunity to work on
cutting-edge SoCs across multiple product segments, including:
- Premium mobile and flagship platforms
- Data center
- AI Accelerator platform
Role OverviewSeeking an experienced
DDR Validation Lead to drive end-to-end validation of next-generation
LPDDR5X and LPDDR6 memory subsystems on AI Accelerator and Flagship mobile platforms. This role will lead memory bring-up, performance validation, system stress, debug, and production readiness from pre-silicon through post-silicon phases.
Key Responsibilities- Define and execute DDR validation strategy across emulation, FPGA, and silicon platforms.
- Drive LPDDR5X/LPDDR6 bring-up, training validation, frequency scaling, low-power state validation, and feature enablement.
- Develop and execute validation plans covering memory functionality, performance, reliability, power, and corner-case scenarios.
- Lead debug of DDR controller, PHY, firmware, SI/PI, timing, and system-level issues.
- Validate interactions between DDR, CPU, GPU, NPU, cache hierarchy, NoC, and system software.
- Drive bandwidth, latency, QoS, memory pressure, and AI workload characterization.
- Develop scalable automation, regression infrastructure, and debug analytics frameworks.
- Partner with Architecture, Design, Firmware, SI/PI, Package, and DRAM vendors to root-cause and resolve issues.
Minium Requirements- BS or MS or PhD in EE, CE, CS, or related field.
- 5+ years of experience in DDR/memory subsystem validation or silicon bring-up.
- Strong understanding of:
- LPDDR4/5/5X/6 architectures
- DDR controllers and PHYs
- Memory training and calibration algorithms
- Cache, coherency, and NoC architectures
- Power management and low-power memory features
- Strong post-silicon debug experience.
- Proficiency in C/C++ and low-level software development.
Preferred Qualifications- Mobile SoC, AI compute, automotive, or server platform validation experience.
- Familiarity with SI/PI analysis, memory performance tuning, and thermal characterization.
- Experience driving first-silicon memory bring-up and volume production qualification.
Minimum Qualifications:• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Pay range and Other Compensation & Benefits: $145,600.00 - $218,400.00
The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer - and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.
