Lead physical design verification efforts, ensuring quality and manufacturable silicon. Collaborate across teams to drive full-chip signoff and resolve complex challenges in cutting-edge technology. Contribute to successful tapeouts in a hybrid environment.

The Machine Learning for Physical Design Intern will work on high-performance designs for AI/ML architectures, developing ML-based tools to enhance chip implementation processes. This role involves collaboration with experienced engineers to improve performance, power, and area metrics in physical design.

Unlock potential by leading cross-functional teams in the development of high-performance RISC-V CPUs, managing the entire lifecycle from specification to post-silicon debug. Thrive in a dynamic environment, aligning objectives and resources to achieve bold milestones.

Engineer high-performance runtime systems for AI accelerators, optimizing execution and memory movement. Collaborate closely with hardware teams to improve efficiency and enhance performance for critical workloads across advanced architectures.

Unlock potential by designing high-performance runtime systems for AI accelerators. Collaborate with a dynamic team to create efficient, low-level software, optimizing hardware capabilities while driving innovative solutions in AI technology.