Champion cutting-edge ASIC packaging design, ensuring robust signal and power integrity while leading a skilled team in high-performance environments. Drive innovation through collaboration across engineering disciplines for optimal results.

Drive innovation by developing software for diagnostic and BSP solutions, ensuring the reliability of network hardware across various platforms, and collaborating with cross-functional teams to solve complex technical challenges.

Lead the charge in developing next-gen ASIC packaging by defining and optimizing design rules, collaborating with teams, and mentoring engineers for signal and power integrity in high-performance environments.

Shape the future of ASIC packaging by leading signal and power integrity efforts. Collaborate with cross-functional teams to develop innovative solutions, ensuring design excellence and performance in high-speed applications across diverse platforms.

Join a team that's driving advanced AI solutions, mentoring developers, and implementing robust full-stack features across Cisco’s product ecosystem while collaborating with diverse technologies and teams for seamless integration.