Advance your expertise in physical design by collaborating on fullchip floorplanning and optimizing complex designs. Leverage your experience with cutting-edge technologies to enhance methodologies and ensure best-in-class performance.

Join a team that's at the forefront of physical design optimization, ensuring seamless flow from RTL to GDSII. Collaborate cross-functionally to uphold design integrity and enhance methodologies using cutting-edge tools and innovative techniques.

Shape the future of physical design by creating optimized floorplans and collaborating on complex architectures. Drive efficiency by analyzing methodologies and enhancing tool flows while ensuring top performance with cutting-edge design techniques.

Drive quality by collaborating with cross-functional teams to enhance ASIC design verification processes, ensuring thorough simulation and emulation coverage while utilizing innovative solutions to boost overall performance.

Drive innovation by defining and designing high-performance ASICs for deployment across diverse platforms. Collaborate with a multi-disciplinary team to achieve power, performance, and area objectives, ensuring quality and efficiency in product development.